1 /* $NetBSD: arm32_boot.c,v 1.46 2025/12/19 13:03:51 nia Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of Genetec Corporation may not be used to endorse or 16 * promote products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 * 31 * Copyright (c) 2001 Wasabi Systems, Inc. 32 * All rights reserved. 33 * 34 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed for the NetBSD Project by 47 * Wasabi Systems, Inc. 48 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 49 * or promote products derived from this software without specific prior 50 * written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 * 64 * Copyright (c) 1997,1998 Mark Brinicombe. 65 * Copyright (c) 1997,1998 Causality Limited. 66 * All rights reserved. 67 * 68 * Redistribution and use in source and binary forms, with or without 69 * modification, are permitted provided that the following conditions 70 * are met: 71 * 1. Redistributions of source code must retain the above copyright 72 * notice, this list of conditions and the following disclaimer. 73 * 2. Redistributions in binary form must reproduce the above copyright 74 * notice, this list of conditions and the following disclaimer in the 75 * documentation and/or other materials provided with the distribution. 76 * 3. All advertising materials mentioning features or use of this software 77 * must display the following acknowledgement: 78 * This product includes software developed by Mark Brinicombe 79 * for the NetBSD Project. 80 * 4. The name of the company nor the name of the author may be used to 81 * endorse or promote products derived from this software without specific 82 * prior written permission. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 85 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 86 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 87 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 88 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 89 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 * Copyright (c) 2007 Microsoft 97 * All rights reserved. 98 * 99 * Redistribution and use in source and binary forms, with or without 100 * modification, are permitted provided that the following conditions 101 * are met: 102 * 1. Redistributions of source code must retain the above copyright 103 * notice, this list of conditions and the following disclaimer. 104 * 2. Redistributions in binary form must reproduce the above copyright 105 * notice, this list of conditions and the following disclaimer in the 106 * documentation and/or other materials provided with the distribution. 107 * 108 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 109 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 110 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 111 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, 112 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 113 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 114 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 115 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 116 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 117 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 118 * SUCH DAMAGE. 119 */ 120 121 #include <sys/cdefs.h> 122 __KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.46 2025/12/19 13:03:51 nia Exp $"); 123 124 #include "opt_arm_debug.h" 125 #include "opt_cputypes.h" 126 #include "opt_ddb.h" 127 #include "opt_kgdb.h" 128 #include "opt_multiprocessor.h" 129 130 #include <sys/param.h> 131 132 #include <sys/asan.h> 133 #include <sys/atomic.h> 134 #include <sys/cpu.h> 135 #include <sys/device.h> 136 #include <sys/intr.h> 137 #include <sys/reboot.h> 138 139 #include <uvm/uvm_extern.h> 140 141 #include <arm/locore.h> 142 #include <arm/undefined.h> 143 #include <arm/arm32/machdep.h> 144 145 #include <machine/db_machdep.h> 146 #include <ddb/db_extern.h> 147 148 #include <machine/bootconfig.h> 149 150 #ifdef KGDB 151 #include <sys/kgdb.h> 152 #endif 153 154 #ifdef VERBOSE_INIT_ARM 155 #define VPRINTF(...) printf(__VA_ARGS__) 156 #else 157 #define VPRINTF(...) __nothing 158 #endif 159 160 vaddr_t 161 initarm_common(vaddr_t kvm_base, vsize_t kvm_size, 162 const struct boot_physmem *bp, size_t nbp) 163 { 164 struct bootmem_info * const bmi = &bootmem_info; 165 166 VPRINTF("nfreeblocks = %u, free_pages = %d (%#x)\n", 167 bmi->bmi_nfreeblocks, bmi->bmi_freepages, 168 bmi->bmi_freepages); 169 170 /* 171 * Moved from cpu_startup() as data_abort_handler() references 172 * this during uvm init. 173 */ 174 uvm_lwp_setuarea(&lwp0, kernelstack.pv_va); 175 176 struct lwp * const l = &lwp0; 177 struct pcb * const pcb = lwp_getpcb(l); 178 179 /* Zero out the PCB. */ 180 memset(pcb, 0, sizeof(*pcb)); 181 182 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP; 183 pcb->pcb_ksp -= sizeof(struct trapframe); 184 185 struct trapframe * tf = (struct trapframe *)pcb->pcb_ksp; 186 187 /* Zero out the trapframe. */ 188 memset(tf, 0, sizeof(*tf)); 189 lwp_settrapframe(l, tf); 190 191 tf->tf_spsr = PSR_USR32_MODE; 192 #ifdef _ARM_ARCH_BE8 193 tf->tf_spsr |= PSR_E_BIT; 194 #endif 195 196 VPRINTF("bootstrap done.\n"); 197 198 VPRINTF("vectors"); 199 arm32_vector_init(systempage.pv_va, ARM_VEC_ALL); 200 VPRINTF(" %#"PRIxVADDR"\n", vector_page); 201 202 /* 203 * Pages were allocated during the secondary bootstrap for the 204 * stacks for different CPU modes. 205 * We must now set the r13 registers in the different CPU modes to 206 * point to these stacks. 207 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 208 * of the stack memory. 209 */ 210 VPRINTF("init subsystems: stacks "); 211 set_stackptr(PSR_FIQ32_MODE, 212 fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE); 213 set_stackptr(PSR_IRQ32_MODE, 214 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 215 set_stackptr(PSR_ABT32_MODE, 216 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 217 set_stackptr(PSR_UND32_MODE, 218 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 219 220 /* 221 * Well we should set a data abort handler. 222 * Once things get going this will change as we will need a proper 223 * handler. 224 * Until then we will use a handler that just panics but tells us 225 * why. 226 * Initialisation of the vectors will just panic on a data abort. 227 * This just fills in a slightly better one. 228 */ 229 VPRINTF("vectors "); 230 data_abort_handler_address = (u_int)data_abort_handler; 231 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 232 undefined_handler_address = (u_int)undefinedinstruction_bounce; 233 234 /* Initialise the undefined instruction handlers */ 235 VPRINTF("undefined "); 236 undefined_init(); 237 238 #ifdef FPU_VFP 239 /* vfp_detect uses an undefined handler */ 240 VPRINTF("vfp "); 241 vfp_detect(curcpu()); 242 #endif 243 244 /* Load memory into UVM. */ 245 VPRINTF("page "); 246 uvm_md_init(); 247 248 VPRINTF("pmap_physload\n"); 249 KASSERT(bp != NULL || nbp == 0); 250 KASSERT(bp == NULL || nbp != 0); 251 252 for (size_t i = 0; i < bmi->bmi_nfreeblocks; i++) { 253 pv_addr_t * const pv = &bmi->bmi_freeblocks[i]; 254 paddr_t start = atop(pv->pv_pa); 255 const paddr_t end = start + atop(pv->pv_size); 256 int vm_freelist = VM_FREELIST_DEFAULT; 257 258 VPRINTF("block %2zu start %08lx end %08lx", i, 259 pv->pv_pa, pv->pv_pa + pv->pv_size); 260 261 if (!bp) { 262 VPRINTF("... loading in freelist %d\n", vm_freelist); 263 uvm_page_physload(start, end, start, end, VM_FREELIST_DEFAULT); 264 continue; 265 } 266 VPRINTF("\n"); 267 268 /* 269 * This assumes the bp list is sorted in ascending 270 * order. 271 */ 272 paddr_t segend = end; 273 for (size_t j = 0; j < nbp && start < end; j++) { 274 paddr_t bp_start = bp[j].bp_start; 275 paddr_t bp_end = bp_start + bp[j].bp_pages; 276 277 VPRINTF(" bp %2zu start %08lx end %08lx\n", 278 j, ptoa(bp_start), ptoa(bp_end)); 279 280 KASSERT(bp_start < bp_end); 281 if (start >= bp_end || segend < bp_start) 282 continue; 283 284 if (start < bp_start) 285 start = bp_start; 286 287 if (start < bp_end) { 288 if (segend > bp_end) { 289 segend = bp_end; 290 } 291 vm_freelist = bp[j].bp_freelist; 292 293 VPRINTF(" start %08lx end %08lx" 294 "... loading in freelist %d\n", ptoa(start), 295 ptoa(segend), vm_freelist); 296 297 uvm_page_physload(start, segend, start, segend, 298 vm_freelist); 299 300 start = segend; 301 segend = end; 302 } 303 } 304 } 305 306 /* 307 * Bootstrap pmap telling it where the managed kernel virtual memory 308 * is. 309 */ 310 VPRINTF("pmap "); 311 pmap_bootstrap(kvm_base, kvm_base + kvm_size); 312 313 kasan_init(); 314 315 #ifdef __HAVE_MEMORY_DISK__ 316 md_root_setconf(memory_disk, sizeof memory_disk); 317 #endif 318 319 #ifdef BOOTHOWTO 320 boothowto |= BOOTHOWTO; 321 #endif 322 323 #ifdef KGDB 324 if (boothowto & RB_KDB) { 325 kgdb_debug_init = 1; 326 kgdb_connect(1); 327 } 328 #endif 329 330 #ifdef DDB 331 db_machine_init(); 332 ddb_init(0, NULL, NULL); 333 334 if (boothowto & RB_KDB) 335 Debugger(); 336 #endif 337 338 #ifdef MULTIPROCESSOR 339 /* 340 * Ensure BP cache is flushed to memory so that APs start cache 341 * coherency with correct view. 342 */ 343 cpu_dcache_wbinv_all(); 344 #endif 345 346 VPRINTF("done.\n"); 347 348 /* We return the new stack pointer address */ 349 return pcb->pcb_ksp; 350 } 351 352 #ifdef MULTIPROCESSOR 353 /* 354 * When we are called, the MMU and caches are on and we are running on the stack 355 * of the idlelwp for this cpu. 356 */ 357 void 358 cpu_hatch(struct cpu_info *ci, u_int cpuindex, void (*md_cpu_init)(struct cpu_info *)) 359 { 360 KASSERT(cpu_index(ci) == cpuindex); 361 362 /* 363 * Raise our IPL to the max 364 */ 365 splhigh(); 366 367 VPRINTF("%s(%s): ", __func__, cpu_name(ci)); 368 /* mpidr/midr filled in by cpu_init_secondary_processor */ 369 370 /* 371 * Make sure we have the right vector page. 372 */ 373 VPRINTF(" vectors"); 374 arm32_vector_init(systempage.pv_va, ARM_VEC_ALL); 375 376 /* 377 * Initialize the stack for each mode (we are already running on the 378 * SVC32 stack of the idlelwp). 379 */ 380 VPRINTF(" stacks"); 381 set_stackptr(PSR_FIQ32_MODE, 382 fiqstack.pv_va + (cpu_index(ci) + 1) * FIQ_STACK_SIZE * PAGE_SIZE); 383 set_stackptr(PSR_IRQ32_MODE, 384 irqstack.pv_va + (cpu_index(ci) + 1) * IRQ_STACK_SIZE * PAGE_SIZE); 385 set_stackptr(PSR_ABT32_MODE, 386 abtstack.pv_va + (cpu_index(ci) + 1) * ABT_STACK_SIZE * PAGE_SIZE); 387 set_stackptr(PSR_UND32_MODE, 388 undstack.pv_va + (cpu_index(ci) + 1) * UND_STACK_SIZE * PAGE_SIZE); 389 390 ci->ci_lastlwp = NULL; 391 ci->ci_pmap_lastuser = NULL; 392 #ifdef ARM_MMU_EXTENDED 393 VPRINTF(" tlb"); 394 /* 395 * Attach to the tlb. 396 */ 397 ci->ci_pmap_cur = pmap_kernel(); 398 ci->ci_pmap_asid_cur = KERNEL_PID; 399 #endif 400 401 #ifdef CPU_CORTEX 402 if (CPU_ID_CORTEX_P(ci->ci_arm_cpuid)) { 403 /* 404 * Start and reset the PMC Cycle Counter. 405 */ 406 armreg_pmcr_write(ARM11_PMCCTL_E|ARM11_PMCCTL_P|ARM11_PMCCTL_C); 407 armreg_pmintenclr_write(PMINTEN_C | PMINTEN_P); 408 armreg_pmcntenset_write(CORTEX_CNTENS_C); 409 } 410 #endif 411 412 VPRINTF(" md(%p)", md_cpu_init); 413 if (md_cpu_init != NULL) 414 (*md_cpu_init)(ci); 415 416 VPRINTF(" interrupts"); 417 /* 418 * Let the interrupts do what they need to on this CPU. 419 */ 420 intr_cpu_init(ci); 421 422 VPRINTF(" done!\n"); 423 cpu_clr_mbox(cpuindex); 424 } 425 #endif /* MULTIPROCESSOR */ 426
Indexes created Sun Oct 25 00:26:45 UTC 2026