| /src/usr.bin/aiomixer/ |
| parse.c | 100 struct aiomixer_control *control; local
129 control = &class->controls[class->numcontrols++];
130 control->info = info;
|
| draw.c | 81 struct aiomixer_control *control, bool selected)
85 value.dev = control->info.index;
86 value.type = control->info.type;
88 value.un.value.num_channels = control->info.un.v.num_channels;
93 wclear(control->widgetpad);
95 wattron(control->widgetpad, A_STANDOUT);
97 wprintw(control->widgetpad, "%s (%s)\n",
98 control->info.label.name, control->info.un.v.units.name);
100 wprintw(control->widgetpad, "%s\n", control->info.label.name)
332 struct aiomixer_control *control; local
380 struct aiomixer_control *control; local
[all...] |
| main.c | 89 struct aiomixer_control *control; local
100 control = &class->controls[n];
102 control->setindex = 0;
103 draw_control(aio, control, true);
105 if (aio->class_scroll_y > control->widget_y) {
106 aio->class_scroll_y = control->widget_y;
110 if ((control->widget_y + control->height) >
112 aio->class_scroll_y = control->widget_y;
132 struct aiomixer_control *control, bool right
217 struct aiomixer_control *control = &class->controls[aio->curcontrol]; local
241 struct aiomixer_control *control; local
260 struct aiomixer_control *control; local
280 struct aiomixer_control *control; local
[all...] |
| /src/usr.sbin/mopd/common/ |
| rc.c | 43 u_char tmpc,code,control; local
83 control = mopGetChar(pkt,&idx); /* Control */
84 (void)fprintf(fd,"Control : %02x ",control);
85 if ((control & (1>>MOP_K_BOT_CNTL_SERVER))) {
92 if ((control & (1>>MOP_K_BOT_CNTL_DEVICE))) {
101 if ((control & (1>>MOP_K_BOT_CNTL_DEVICE))) {
240 "Control Flags: %02x Message %d ",tmpc,tmpc & 1);
275 "Control Flags: %02x Message %d ",tmpc,tmpc & 1)
[all...] |
| /src/usr.sbin/sdpd/ |
| main.c | 66 char const *control = SDP_LOCAL_PATH; local
75 case 'c': /* control */
76 control = optarg;
134 if (!server_init(&server, control, sgroup))
243 "\t-c specify control socket name (default %s)\n"
|
| sdpd.h | 91 bool control;/* descriptor is control socket */ member in struct:fd_idx
106 size_t ctllen; /* control msg buffer length */
107 uint8_t * ctlbuf; /* control msg buffer */
|
| /src/sys/compat/common/ |
| uipc_syscalls_43.c | 220 struct mbuf *from, *control; local
240 omsg.msg_accrights != NULL ? &control : NULL, retval);
245 * If there is any control information and it's SCM_RIGHTS,
247 * XXX: maybe there can be more than one chunk of control data?
249 if (omsg.msg_accrights && control != NULL) {
250 struct cmsghdr *cmsg = mtod(control, struct cmsghdr *);
258 free_control_mbuf(l, control, control->m_next);
261 free_control_mbuf(l, control, control);
[all...] |
| /src/sys/dev/i2c/ |
| gttwsi_core.c | 199 uint32_t control, status; local
204 control = CONTROL_STOP | CONTROL_TWSIEN;
206 control |= CONTROL_IFLG;
207 gttwsi_write_4(sc, TWSI_CONTROL, control);
307 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect,
322 control |= CONTROL_INTEN;
324 control |= CONTROL_IFLG;
326 gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN);
330 control = gttwsi_read_4(sc, TWSI_CONTROL);
331 if (control & CONTROL_IFLG
[all...] |
| /src/sys/dev/ic/ |
| pca9564.c | 120 uint8_t control; local
123 control = CSR_READ(sc, PCA9564_I2CCON);
124 control |= I2CCON_ENSIO;
125 control &= ~(I2CCON_STA|I2CCON_STO|I2CCON_SI|I2CCON_AA);
126 control &= ~I2CCON_CR_MASK;
127 control |= sc->sc_i2c_clock;
128 CSR_WRITE(sc, PCA9564_I2CCON, control);
138 uint8_t control; local
141 control = CSR_READ(sc, PCA9564_I2CCON);
142 control &= ~I2CCON_ENSIO
171 uint8_t control; local
187 uint8_t control; local
204 uint8_t data, control; local
260 uint8_t control; local
286 uint8_t control; local
[all...] |
| lpt.c | 158 u_char control; local
193 control = LPC_SELECT | LPC_NINIT;
194 bus_space_write_1(iot, ioh, lpt_control, control);
212 control |= LPC_IENABLE;
214 control |= LPC_AUTOLF;
215 sc->sc_control = control;
216 bus_space_write_1(iot, ioh, lpt_control, control);
302 u_char control = sc->sc_control; local
328 control | LPC_STROBE);
331 bus_space_write_1(iot, ioh, lpt_control, control);
410 u_char control = sc->sc_control; local
[all...] |
| /src/sys/dev/scsipi/ |
| scsi_all.h | 50 u_int8_t control; member in struct:scsi_changedef
|
| /src/tests/net/net/ |
| t_pktinfo.c | 106 char control[CMSG_SPACE(sizeof(*ipi)) * 2]; local
116 msg.msg_control = control;
117 msg.msg_controllen = sizeof(control);
|
| /src/lib/libm/arch/i387/ |
| fenv.c | 58 /* Load x87 Control Word */
62 /* No-Wait Store Control Word */
110 .control = __NetBSD_NPXCW__, /* Control word register */
142 uint16_t control; local
148 __fnstcw(&control);
149 __fe_dfl_env.x87.control = control;
301 uint16_t control; local
305 * rounding mode. Reading the control word on the x87 turn
323 uint16_t control; local
478 uint16_t control; local
502 uint16_t control; local
525 uint16_t control; local
[all...] |
| /src/lib/libm/arch/x86_64/ |
| fenv.c | 56 /* Load x87 Control Word */
60 /* No-Wait Store Control Word */
108 __NetBSD_NPXCW__, /* Control word register */
126 uint16_t control; local
128 __fnstcw(&control);
129 __fe_dfl_env.x87.control = control;
283 uint16_t control; local
291 __fnstcw(&control);
294 if ((control & _X87_ROUNDING_MASK
311 uint16_t control; local
497 uint16_t control; local
520 uint16_t control; local
540 uint16_t control; local
[all...] |
| /src/sys/arch/amd64/include/ |
| fenv.h | 35 /* Default x87 control word. */
37 /* Modern NetBSD uses the default control word.. */
79 * As compared to the x87 control word, the SSE unit's control word
80 * has the rounding control bits offset by 3 and the exception mask
93 uint32_t control; /* Control word register */ member in struct:__anon925::__anon926
99 uint32_t mxcsr; /* Control and status register */
114 * A floating-point control mode is a system variable whose value may be set by
|
| /src/sys/arch/arm/footbridge/ |
| footbridge_clock.c | 207 int control; local
211 control = TIMER_FCLK_256;
214 control = TIMER_FCLK_16;
217 control = TIMER_FCLK;
219 control |= (TIMER_ENABLE | TIMER_MODE_PERIODIC);
223 base + TIMER_CONTROL, control);
|
| /src/sys/arch/evbarm/stand/boot2440/ |
| s3csdi.c | 111 int control; local
117 control = SDI_REG(SDI_CON);
118 SDI_REG(SDI_CON) = control & ~SDICON_ENCLK;
136 SDI_REG(SDI_CON) = control | SDICON_ENCLK;
|
| /src/sys/arch/i386/include/ |
| fenv.h | 35 /* Default x87 control word. */
37 /* Modern NetBSD uses the default control word.. */
79 * As compared to the x87 control word, the SSE unit's control has the rounding
80 * control bits offset by 3 and the exception mask bits offset by 7
91 uint16_t control; /* Control word register */ member in struct:__anon1449::__anon1450
100 uint32_t mxcsr; /* Control and status register */
123 * A floating-point control mode is a system variable whose value may be set by
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
| mpt.h | 121 u16 control, data; local
125 control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset));
130 if (!(control & MSI_CAP_EN))
133 if (WARN(control & GENMASK(15, 1), "only support one MSI format\n"))
|
| /src/sys/arch/arm/broadcom/ |
| bcm2835_vcaudioreg.h | 49 VC_AUDIO_MSG_TYPE_CONTROL, // control
148 VC_AUDIO_CONTROL_T control; member in union:__anon1030::__anon1031
|
| /src/sys/arch/arm/marvell/ |
| dove.c | 484 uint32_t control, status, psw, pmucr; local
501 * 2. Program the new CPU Speed mode in the CPU Subsystem DFS Control
504 control = READ_PMUREG(sc, DOVE_PMU_CPUSDFSCR);
506 control |= DOVE_PMU_CPUSDFSCR_CPUSLOWEN;
507 control |= DOVE_PMU_CPUSDFSCR_CPUL2CR(sc->sc_dpratio);
509 control &= ~DOVE_PMU_CPUSDFSCR_CPUSLOWEN;
510 control |= DOVE_PMU_CPUSDFSCR_CPUL2CR(sc->sc_xpratio);
512 WRITE_PMUREG(sc, DOVE_PMU_CPUSDFSCR, control);
522 * 4. Set the <MaskFIQ> and <MaskIRQ> field in the PMU Control Register.
533 * 5. Set the <DFSEn> field in the CPU Subsystem DFS Control Register
[all...] |
| /src/sys/arch/arm/ti/ |
| ti_dpll_clock.c | 282 uint32_t control, mult_div1; local
296 control = RD4(sc, REG_CONTROL);
297 control &= ~AM3_DPLL_EN;
298 control |= __SHIFTIN(AM3_DPLL_EN_NM_BYPASS, AM3_DPLL_EN);
299 WR4(sc, REG_CONTROL, control);
308 control &= ~AM3_DPLL_EN;
309 control |= __SHIFTIN(AM3_DPLL_EN_LOCK, AM3_DPLL_EN);
310 WR4(sc, REG_CONTROL, control);
324 uint32_t control, mult_div1; local
336 control = RD4(sc, REG_CONTROL)
[all...] |
| /src/sys/arch/evbarm/ifpga/ |
| ifpga_clock.c | 194 int control; local
200 control = (TIMERx_CTRL_ENABLE | TIMERx_CTRL_MODE_PERIODIC |
203 control = (TIMERx_CTRL_ENABLE | TIMERx_CTRL_MODE_PERIODIC |
210 base + TIMERx_CTRL, control);
|
| /src/sys/arch/sgimips/mace/ |
| pci_mace.c | 126 u_int32_t control; local
172 control = bus_space_read_4(pc->iot, pc->ioh, MACEPCI_CONTROL);
173 control |= CONTROL_INT_MASK;
174 bus_space_write_4(pc->iot, pc->ioh, MACEPCI_CONTROL, control);
|
| /src/sys/arch/vax/uba/ |
| qvaux.c | 131 #define control inline macro
133 static control uint
143 static control u_int
153 static control void
164 static control void
796 // QVSS has no modem control signals
|
