| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_cursor.c | 41 uint32_t cur_lock; local in function:radeon_lock_cursor
44 cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset);
46 cur_lock |= EVERGREEN_CURSOR_UPDATE_LOCK;
48 cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK;
49 WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);
51 cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset);
53 cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;
55 cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
56 WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);
58 cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_dce_v10_0.c | 2295 uint32_t cur_lock; local in function:dce_v10_0_lock_cursor
2297 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset);
2299 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 1);
2301 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 0);
2302 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock);
|
| amdgpu_dce_v11_0.c | 2374 uint32_t cur_lock; local in function:dce_v11_0_lock_cursor
2376 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset);
2378 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 1);
2380 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 0);
2381 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock);
|
| amdgpu_dce_v6_0.c | 2187 uint32_t cur_lock; local in function:dce_v6_0_lock_cursor
2189 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset);
2191 cur_lock |= CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK;
2193 cur_lock &= ~CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK;
2194 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock);
|
| amdgpu_dce_v8_0.c | 2198 uint32_t cur_lock; local in function:dce_v8_0_lock_cursor
2200 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset);
2202 cur_lock |= CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK;
2204 cur_lock &= ~CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK;
2205 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock);
|
