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    Searched defs:levels (Results 1 - 25 of 43) sorted by relevancy

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  /src/sys/dev/fdt/
pwm_fan.c 80 const u_int *levels; local in function:pwm_fan_attach
91 levels = fdtbus_get_prop(phandle, "cooling-levels", &len);
93 aprint_error(": couldn't get 'cooling-levels' property\n");
99 sc->sc_levels[n] = be32toh(levels[n]);
103 aprint_normal(" (levels");
pwm_backlight.c 88 const u_int *levels; local in function:pwm_backlight_attach
109 levels = fdtbus_get_prop(phandle, "brightness-levels", &len);
110 if (levels != NULL) {
114 sc->sc_levels[n] = be32toh(levels[n]);
242 0, CTLTYPE_STRING, "levels", NULL,
  /src/sys/arch/shark/isa/
isa_irqhandler.c 122 * Setup the irqmasks for the different Interrupt Priority Levels
277 /* First, figure out which levels each IRQ uses. */
279 int levels = 0; local in function:irq_calculatemasks
281 levels |= 1 << ptr->ih_level;
282 irqlevel[irq] = levels;
  /src/sys/arch/x86/x86/
x86_softintr.c 169 /* First, figure out which levels each IRQ uses. */
172 int levels = 0; local in function:x86_intr_calculatemasks
179 levels |= 1 << q->ih_level;
180 intrlevel[irq] = levels;
181 if (levels)
  /src/lib/libkvm/
kvm_aarch64.c 116 /* how many levels of page tables do we have? */
117 u_int levels = howmany(inputsz - page_shift, pte_shift); local in function:_kvm_kvatop
122 u_int addr_shift = page_shift + (levels - 1) * pte_shift;
155 if (--levels == 0) {
  /src/lib/libc/db/btree/
bt_debug.c 307 int levels; local in function:__bt_stat
335 /* Count the levels of the tree. */
336 for (i = P_ROOT, levels = 0 ;; ++levels) {
339 if (levels == 0)
340 levels = 1;
351 levels, levels == 1 ? "" : "s", nkeys);
  /src/sys/arch/arm/at91/
at91aic.c 135 int levels = 0; local in function:at91aic_calculate_masks
140 levels |= (1U << ih->ih_ipl);
141 iq->iq_levels = levels;
  /src/sys/arch/arm/footbridge/
footbridge_irqhandler.c 117 int levels = 0; local in function:footbridge_intr_calculate_masks
121 levels |= (1U << ih->ih_ipl);
123 iq->iq_levels = levels;
  /src/sys/arch/arm/footbridge/isa/
isa_machdep.c 187 /* First, figure out which levels each IRQ uses. */
189 int levels = 0; local in function:intr_calculatemasks
193 levels |= (1U << ih->ih_ipl);
194 iq->iq_levels = levels;
  /src/sys/arch/arm/ixp12x0/
ixp12x0_intr.c 176 int levels = 0; local in function:ixp12x0_intr_calculate_masks
181 levels |= (1U << ih->ih_ipl);
182 iq->iq_levels = levels;
  /src/sys/arch/arm/xscale/
becc_icu.c 173 int levels = 0; local in function:becc_intr_calculate_masks
178 levels |= (1U << ih->ih_ipl);
179 iq->iq_levels = levels;
ixp425_intr.c 198 int levels = 0; local in function:ixp425_intr_calculate_masks
203 levels |= (1U << ih->ih_ipl);
204 iq->iq_levels = levels;
  /src/sys/arch/evbarm/ifpga/
ifpga_intr.c 149 int levels = 0; local in function:ifpga_intr_calculate_masks
154 levels |= (1U << ih->ih_ipl);
155 iq->iq_levels = levels;
  /src/sys/arch/evbarm/iq80310/
iq80310_intr.c 153 int levels = 0; local in function:iq80310_intr_calculate_masks
158 levels |= (1U << ih->ih_ipl);
159 iq->iq_levels = levels;
  /src/sys/arch/macppc/macppc/
pic_heathrow.c 157 uint32_t levels; local in function:heathrow_reenable_irq
163 levels = in32rb(INT_STATE_REG_H);
164 if (levels & mask) {
171 levels = in32rb(INT_STATE_REG_L);
172 if (levels & mask) {
198 uint32_t irqs, events, levels; local in function:heathrow_read_events
204 levels = in32rb(INT_LEVEL_REG_L) & heathrow->enable_mask_l;
205 events |= levels & heathrow->level_mask_l;
212 levels = in32rb(INT_LEVEL_REG_L) & heathrow->enable_mask_h;
213 events |= levels & heathrow->level_mask_h
    [all...]
pic_ohare.c 178 uint32_t levels; local in function:ohare_reenable_irq
183 levels = in32rb(INT_STATE_REG);
184 if (levels & mask) {
204 uint32_t irqs, events, levels; local in function:ohare_read_events
209 levels = in32rb(INT_LEVEL_REG) & ohare->enable_mask;
210 events |= levels & ohare->level_mask;
270 printf("levels: %08x\n", in32rb(INT_LEVEL_REG));
  /src/sys/arch/arm/ep93xx/
ep93xx_intr.c 122 int levels = 0; local in function:ep93xx_intr_calculate_masks
127 levels |= (1U << ih->ih_ipl);
128 iq->iq_levels = levels;
  /src/sys/arch/arc/isa/
isabus.c 260 /* First, figure out which levels each IRQ uses. */
262 int levels = 0; local in function:intr_calculatemasks
264 levels |= 1 << q->ih_level;
265 intrlevel[irq] = levels;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
trinity_dpm.h 51 struct trinity_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS]; member in struct:trinity_ps
rv770_smc.h 137 RV770_SMC_HW_PERFORMANCE_LEVEL levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE]; member in struct:RV770_SMC_SWSTATE
  /src/tests/modules/x86_pte_tester/
x86_pte_tester.c 51 vaddr_t levels[NLEVEL]; member in struct:__anon91e1af1f0108
89 pd_entry_t *pd = (pd_entry_t *)tester_ctx.levels[0];
92 pmap_kenter_pa(tester_ctx.levels[0], pa, VM_PROT_READ, 0);
102 pmap_kremove(tester_ctx.levels[0], PAGE_SIZE);
109 pd_entry_t *pd = (pd_entry_t *)tester_ctx.levels[1];
113 pmap_kenter_pa(tester_ctx.levels[1], pa, VM_PROT_READ, 0);
129 pmap_kremove(tester_ctx.levels[1], PAGE_SIZE);
136 pd_entry_t *pd = (pd_entry_t *)tester_ctx.levels[2];
140 pmap_kenter_pa(tester_ctx.levels[2], pa, VM_PROT_READ, 0);
156 pmap_kremove(tester_ctx.levels[2], PAGE_SIZE)
    [all...]
  /src/sys/ufs/ext2fs/
ext2fs_htree.c 671 int levels = 0; local in function:ext2fs_htree_check_next
682 levels++;
691 while (levels > 0) {
692 levels--;
719 uint32_t levels, cnt; local in function:ext2fs_htree_find_leaf
749 if ((levels = rootp->h_info.h_ind_levels) > 1)
779 if (levels == 0)
781 levels--;
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
kv_dpm.h 110 struct kv_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS]; member in struct:kv_ps
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_vegam_smumgr.c 411 /* Setup BIF_SCLK levels */
824 /* populate graphics levels */
880 struct SMU75_Discrete_GraphicsLevel *levels = local in function:vegam_populate_all_graphic_levels
898 levels[i].UpHyst = (uint8_t)
900 levels[i].DownHyst = (uint8_t)
904 levels[i].DeepSleepDivId = 0;
916 levels[i].EnabledForActivity =
921 "There must be 1 or more PCIE levels defined in PPTable.",
925 levels[i].pcieDpmLevel =
950 levels[i].pcieDpmLevel = hightest_pcie_level_enabled
1047 struct SMU75_Discrete_MemoryLevel *levels = local in function:vegam_populate_all_memory_levels
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/mmu/
nouveau_nvkm_subdev_mmu_vmm.c 560 * newer having dual page tables at some levels, which
1170 int levels, bits = 0, ret; local in function:nvkm_vmm_ctor
1190 for (levels = 0, desc = page->desc; desc->bits; desc++, levels++)
1195 if (WARN_ON(levels > NVKM_VMM_LEVELS_MAX))

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