| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_rv730_dpm.c | 52 u32 spll_func_cntl_3 = pi->clk_regs.rv730.cg_spll_func_cntl_3; local in function:rv730_populate_sclk_value
91 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;
92 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv);
93 spll_func_cntl_3 |= SPLL_DITHEN;
116 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
244 u32 spll_func_cntl_3; local in function:rv730_populate_smc_acpi_state
293 spll_func_cntl_3 = pi->clk_regs.rv730.cg_spll_func_cntl_3;
311 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
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| radeon_rv740_dpm.c | 132 u32 spll_func_cntl_3 = pi->clk_regs.rv770.cg_spll_func_cntl_3; local in function:rv740_populate_sclk_value
159 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;
160 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv);
161 spll_func_cntl_3 |= SPLL_DITHEN;
184 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
329 u32 spll_func_cntl_3 = pi->clk_regs.rv770.cg_spll_func_cntl_3; local in function:rv740_populate_smc_acpi_state
389 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
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| radeon_cypress_dpm.c | 1353 u32 spll_func_cntl_3 = local in function:cypress_populate_smc_acpi_state
1458 cpu_to_be32(spll_func_cntl_3);
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| radeon_rv770_dpm.c | 498 u32 spll_func_cntl_3 = local in function:rv770_populate_sclk_value
538 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;
539 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv);
540 spll_func_cntl_3 |= SPLL_DITHEN;
563 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
936 u32 spll_func_cntl_3 = local in function:rv770_populate_smc_acpi_state
998 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
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| radeon_ni_dpm.c | 1808 u32 spll_func_cntl_3 = ni_pi->clock_registers.cg_spll_func_cntl_3; local in function:ni_populate_smc_acpi_state
1920 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
2011 u32 spll_func_cntl_3 = ni_pi->clock_registers.cg_spll_func_cntl_3; local in function:ni_calculate_sclk_params
2040 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;
2041 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv);
2042 spll_func_cntl_3 |= SPLL_DITHEN;
2065 sclk->vCG_SPLL_FUNC_CNTL_3 = spll_func_cntl_3;
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| radeon_ci_dpm.c | 3171 u32 spll_func_cntl_3 = pi->clock_registers.cg_spll_func_cntl_3; local in function:ci_calculate_sclk_params
3189 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;
3190 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv);
3191 spll_func_cntl_3 |= SPLL_DITHEN;
3212 sclk->CgSpllFuncCntl3 = spll_func_cntl_3;
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| radeon_si_dpm.c | 4500 u32 spll_func_cntl_3 = si_pi->clock_registers.cg_spll_func_cntl_3; local in function:si_populate_smc_acpi_state
4606 cpu_to_be32(spll_func_cntl_3);
4794 u32 spll_func_cntl_3 = si_pi->clock_registers.cg_spll_func_cntl_3; local in function:si_calculate_sclk_params
4822 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;
4823 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv);
4824 spll_func_cntl_3 |= SPLL_DITHEN;
4847 sclk->vCG_SPLL_FUNC_CNTL_3 = spll_func_cntl_3;
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| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_ci_smumgr.c | 306 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; local in function:ci_calculate_sclk_params
335 /* SPLL_FUNC_CNTL_3 setup*/
336 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
340 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
365 sclk->CgSpllFuncCntl3 = spll_func_cntl_3;
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| amdgpu_fiji_smumgr.c | 868 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; local in function:fiji_calculate_sclk_params
897 /* SPLL_FUNC_CNTL_3 setup*/
898 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
902 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
934 sclk->CgSpllFuncCntl3 = spll_func_cntl_3;
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| amdgpu_iceland_smumgr.c | 806 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; local in function:iceland_calculate_sclk_params
835 /* SPLL_FUNC_CNTL_3 setup*/
836 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3,
840 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3,
869 sclk->CgSpllFuncCntl3 = spll_func_cntl_3;
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| amdgpu_tonga_smumgr.c | 549 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; local in function:tonga_calculate_sclk_params
578 /* SPLL_FUNC_CNTL_3 setup*/
579 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3,
583 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3,
612 sclk->CgSpllFuncCntl3 = spll_func_cntl_3;
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_si_dpm.c | 4964 u32 spll_func_cntl_3 = si_pi->clock_registers.cg_spll_func_cntl_3; local in function:si_populate_smc_acpi_state
5071 cpu_to_be32(spll_func_cntl_3);
5258 u32 spll_func_cntl_3 = si_pi->clock_registers.cg_spll_func_cntl_3; local in function:si_calculate_sclk_params
5286 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;
5287 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv);
5288 spll_func_cntl_3 |= SPLL_DITHEN;
5311 sclk->vCG_SPLL_FUNC_CNTL_3 = spll_func_cntl_3;
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