1 /* $NetBSD: cpufreq_dt.c,v 1.21 2026/10/17 21:04:44 yurix Exp $ */ 2 3 /*- 4 * Copyright (c) 2015-2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: cpufreq_dt.c,v 1.21 2026/10/17 21:04:44 yurix Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <sys/kmem.h> 36 #include <sys/bus.h> 37 #include <sys/atomic.h> 38 #include <sys/xcall.h> 39 #include <sys/sysctl.h> 40 #include <sys/queue.h> 41 #include <sys/once.h> 42 #include <sys/cpu.h> 43 44 #include <dev/fdt/fdtvar.h> 45 #include <dev/fdt/fdt_opp.h> 46 47 struct cpufreq_dt_table { 48 int phandle; 49 TAILQ_ENTRY(cpufreq_dt_table) next; 50 }; 51 52 static TAILQ_HEAD(, cpufreq_dt_table) cpufreq_dt_tables = 53 TAILQ_HEAD_INITIALIZER(cpufreq_dt_tables); 54 static kmutex_t cpufreq_dt_tables_lock; 55 56 struct cpufreq_dt_opp { 57 u_int freq_khz; 58 u_int voltage_target_uv; 59 u_int voltage_min_uv; 60 u_int voltage_max_uv; 61 u_int latency_ns; 62 }; 63 64 struct cpufreq_dt_softc { 65 device_t sc_dev; 66 int sc_phandle; 67 struct clk *sc_clk; 68 struct fdtbus_regulator *sc_supply; 69 70 struct cpufreq_dt_opp *sc_opp; 71 ssize_t sc_nopp; 72 73 u_int sc_freq_target; 74 bool sc_freq_throttle; 75 76 u_int sc_busy; 77 78 char *sc_freq_available; 79 int sc_node_target; 80 int sc_node_current; 81 int sc_node_available; 82 83 struct cpufreq_dt_table sc_table; 84 }; 85 86 static void 87 cpufreq_dt_change_cb(void *arg1, void *arg2) 88 { 89 struct cpufreq_dt_softc * const sc = arg1; 90 struct cpu_info *ci = curcpu(); 91 92 ci->ci_data.cpu_cc_freq = clk_get_rate(sc->sc_clk); 93 } 94 95 static int 96 cpufreq_dt_set_rate(struct cpufreq_dt_softc *sc, u_int freq_khz) 97 { 98 struct cpufreq_dt_opp *opp = NULL; 99 u_int old_rate, new_rate, old_uv, target_uv, min_uv, max_uv; 100 uint64_t xc; 101 int error; 102 ssize_t n; 103 104 for (n = 0; n < sc->sc_nopp; n++) 105 if (sc->sc_opp[n].freq_khz == freq_khz) { 106 opp = &sc->sc_opp[n]; 107 break; 108 } 109 if (opp == NULL) 110 return EINVAL; 111 112 old_rate = clk_get_rate(sc->sc_clk); 113 new_rate = freq_khz * 1000; 114 target_uv = opp->voltage_target_uv; 115 min_uv = opp->voltage_min_uv; 116 max_uv = opp->voltage_max_uv; 117 118 if (old_rate == new_rate) 119 return 0; 120 121 if (sc->sc_supply != NULL) { 122 error = fdtbus_regulator_get_voltage(sc->sc_supply, &old_uv); 123 if (error != 0) 124 return error; 125 126 if (target_uv > old_uv) { 127 error = fdtbus_regulator_set_voltage_triple( 128 sc->sc_supply, target_uv, min_uv, max_uv); 129 if (error != 0) 130 return error; 131 } 132 } 133 134 error = clk_set_rate(sc->sc_clk, new_rate); 135 if (error != 0) 136 return error; 137 138 const u_int latency_us = howmany(opp->latency_ns, 1000); 139 if (latency_us > 0) 140 delay(latency_us); 141 142 if (sc->sc_supply != NULL) { 143 if (target_uv < old_uv) { 144 error = fdtbus_regulator_set_voltage_triple( 145 sc->sc_supply, target_uv, min_uv, max_uv); 146 if (error != 0) 147 return error; 148 } 149 } 150 151 if (error == 0) { 152 xc = xc_broadcast(0, cpufreq_dt_change_cb, sc, NULL); 153 xc_wait(xc); 154 155 pmf_event_inject(NULL, PMFE_SPEED_CHANGED); 156 } 157 158 return 0; 159 } 160 161 static void 162 cpufreq_dt_throttle_enable(device_t dev) 163 { 164 struct cpufreq_dt_softc * const sc = device_private(dev); 165 166 if (sc->sc_freq_throttle) 167 return; 168 169 const u_int freq_khz = sc->sc_opp[sc->sc_nopp - 1].freq_khz; 170 171 while (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0) 172 kpause("throttle", false, 1, NULL); 173 174 if (cpufreq_dt_set_rate(sc, freq_khz) == 0) { 175 aprint_debug_dev(sc->sc_dev, "throttle enabled (%u.%03u MHz)\n", 176 freq_khz / 1000, freq_khz % 1000); 177 sc->sc_freq_throttle = true; 178 if (sc->sc_freq_target == 0) 179 sc->sc_freq_target = clk_get_rate(sc->sc_clk) / 1000000; 180 } 181 182 atomic_dec_uint(&sc->sc_busy); 183 } 184 185 static void 186 cpufreq_dt_throttle_disable(device_t dev) 187 { 188 struct cpufreq_dt_softc * const sc = device_private(dev); 189 190 if (!sc->sc_freq_throttle) 191 return; 192 193 while (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0) 194 kpause("throttle", false, 1, NULL); 195 196 const u_int freq_khz = sc->sc_freq_target * 1000; 197 198 if (cpufreq_dt_set_rate(sc, freq_khz) == 0) { 199 aprint_debug_dev(sc->sc_dev, "throttle disabled (%u.%03u MHz)\n", 200 freq_khz / 1000, freq_khz % 1000); 201 sc->sc_freq_throttle = false; 202 } 203 204 atomic_dec_uint(&sc->sc_busy); 205 } 206 207 static int 208 cpufreq_dt_sysctl_helper(SYSCTLFN_ARGS) 209 { 210 struct cpufreq_dt_softc * const sc = rnode->sysctl_data; 211 struct sysctlnode node; 212 u_int fq, oldfq = 0; 213 int error, n; 214 215 node = *rnode; 216 node.sysctl_data = &fq; 217 218 if (rnode->sysctl_num == sc->sc_node_target) { 219 if (sc->sc_freq_target == 0) 220 sc->sc_freq_target = clk_get_rate(sc->sc_clk) / 1000000; 221 fq = sc->sc_freq_target; 222 } else 223 fq = clk_get_rate(sc->sc_clk) / 1000000; 224 225 if (rnode->sysctl_num == sc->sc_node_target) 226 oldfq = fq; 227 228 if (sc->sc_freq_target == 0) 229 sc->sc_freq_target = fq; 230 231 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 232 if (error || newp == NULL) 233 return error; 234 235 if (fq == oldfq || rnode->sysctl_num != sc->sc_node_target) 236 return 0; 237 238 for (n = 0; n < sc->sc_nopp; n++) 239 if (sc->sc_opp[n].freq_khz / 1000 == fq) 240 break; 241 if (n == sc->sc_nopp) 242 return EINVAL; 243 244 if (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0) 245 return EBUSY; 246 247 sc->sc_freq_target = fq; 248 249 if (sc->sc_freq_throttle) 250 error = 0; 251 else 252 error = cpufreq_dt_set_rate(sc, fq * 1000); 253 254 atomic_dec_uint(&sc->sc_busy); 255 256 return error; 257 } 258 259 static struct cpu_info * 260 cpufreq_dt_cpu_lookup(cpuid_t mpidr) 261 { 262 CPU_INFO_ITERATOR cii; 263 struct cpu_info *ci; 264 265 for (CPU_INFO_FOREACH(cii, ci)) { 266 if (ci->ci_cpuid == mpidr) 267 return ci; 268 } 269 270 return NULL; 271 } 272 273 static void 274 cpufreq_dt_init_sysctl(struct cpufreq_dt_softc *sc) 275 { 276 const struct sysctlnode *node, *cpunode; 277 struct sysctllog *cpufreq_log = NULL; 278 struct cpu_info *ci; 279 bus_addr_t mpidr; 280 int error, i; 281 282 if (fdtbus_get_reg(sc->sc_phandle, 0, &mpidr, 0) != 0) 283 return; 284 285 ci = cpufreq_dt_cpu_lookup(mpidr); 286 if (ci == NULL) 287 return; 288 289 sc->sc_freq_available = kmem_zalloc(strlen("XXXX ") * sc->sc_nopp, KM_SLEEP); 290 for (i = 0; i < sc->sc_nopp; i++) { 291 char buf[6]; 292 snprintf(buf, sizeof(buf), i ? " %u" : "%u", sc->sc_opp[i].freq_khz / 1000); 293 strcat(sc->sc_freq_available, buf); 294 } 295 296 error = sysctl_createv(&cpufreq_log, 0, NULL, &node, 297 CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL, 298 NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL); 299 if (error) 300 goto sysctl_failed; 301 error = sysctl_createv(&cpufreq_log, 0, &node, &node, 302 0, CTLTYPE_NODE, "cpufreq", NULL, 303 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL); 304 if (error) 305 goto sysctl_failed; 306 error = sysctl_createv(&cpufreq_log, 0, &node, &cpunode, 307 0, CTLTYPE_NODE, cpu_name(ci), NULL, 308 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL); 309 if (error) 310 goto sysctl_failed; 311 312 error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node, 313 CTLFLAG_READWRITE, CTLTYPE_INT, "target", NULL, 314 cpufreq_dt_sysctl_helper, 0, (void *)sc, 0, 315 CTL_CREATE, CTL_EOL); 316 if (error) 317 goto sysctl_failed; 318 sc->sc_node_target = node->sysctl_num; 319 320 error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node, 321 CTLFLAG_READWRITE, CTLTYPE_INT, "current", NULL, 322 cpufreq_dt_sysctl_helper, 0, (void *)sc, 0, 323 CTL_CREATE, CTL_EOL); 324 if (error) 325 goto sysctl_failed; 326 sc->sc_node_current = node->sysctl_num; 327 328 error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node, 329 0, CTLTYPE_STRING, "available", NULL, 330 NULL, 0, sc->sc_freq_available, 0, 331 CTL_CREATE, CTL_EOL); 332 if (error) 333 goto sysctl_failed; 334 sc->sc_node_available = node->sysctl_num; 335 336 return; 337 338 sysctl_failed: 339 aprint_error_dev(sc->sc_dev, "couldn't create sysctl nodes: %d\n", error); 340 sysctl_teardown(&cpufreq_log); 341 } 342 343 static int 344 cpufreq_dt_parse_opp(struct cpufreq_dt_softc *sc) 345 { 346 const int phandle = sc->sc_phandle; 347 const u_int *opp; 348 int len, i; 349 350 opp = fdtbus_get_prop(phandle, "operating-points", &len); 351 if (len < 8) 352 return ENXIO; 353 354 sc->sc_nopp = len / 8; 355 sc->sc_opp = kmem_zalloc(sizeof(*sc->sc_opp) * sc->sc_nopp, KM_SLEEP); 356 for (i = 0; i < sc->sc_nopp; i++, opp += 2) { 357 sc->sc_opp[i].freq_khz = be32toh(opp[0]); 358 u_int voltage_uv = be32toh(opp[1]); 359 sc->sc_opp[i].voltage_target_uv = voltage_uv; 360 sc->sc_opp[i].voltage_min_uv = voltage_uv; 361 sc->sc_opp[i].voltage_max_uv = voltage_uv; 362 } 363 364 return 0; 365 } 366 367 static const struct fdt_opp_info * 368 cpufreq_dt_lookup_opp_info(const int opp_table) 369 { 370 __link_set_decl(fdt_opps, struct fdt_opp_info); 371 struct fdt_opp_info * const *opp; 372 const struct fdt_opp_info *best_opp = NULL; 373 int match, best_match = 0; 374 375 __link_set_foreach(opp, fdt_opps) { 376 const struct device_compatible_entry compat_data[] = { 377 { .compat = (*opp)->opp_compat }, 378 DEVICE_COMPAT_EOL 379 }; 380 381 match = of_compatible_match(opp_table, compat_data); 382 if (match > best_match) { 383 best_match = match; 384 best_opp = *opp; 385 } 386 } 387 388 return best_opp; 389 } 390 391 static bool 392 cpufreq_dt_opp_v2_supported(const int opp_table, const int opp_node) 393 { 394 return true; 395 } 396 397 FDT_OPP(opp_v2, "operating-points-v2", cpufreq_dt_opp_v2_supported); 398 399 static bool 400 cpufreq_dt_node_supported(const struct fdt_opp_info *opp_info, const int opp_table, const int opp_node) 401 { 402 if (!fdtbus_status_okay(opp_node)) 403 return false; 404 if (of_hasprop(opp_node, "opp-suspend")) 405 return false; 406 407 if (opp_info != NULL) 408 return opp_info->opp_supported(opp_table, opp_node); 409 410 return false; 411 } 412 413 static int 414 cpufreq_dt_parse_opp_v2(struct cpufreq_dt_softc *sc) 415 { 416 const int phandle = sc->sc_phandle; 417 struct cpufreq_dt_table *table; 418 const struct fdt_opp_info *opp_info; 419 const u_int *opp_uv; 420 uint64_t opp_hz; 421 int opp_node, len, i, index; 422 423 const int opp_table = fdtbus_get_phandle(phandle, "operating-points-v2"); 424 if (opp_table < 0) 425 return ENOENT; 426 427 /* If the table is shared, only setup a single instance */ 428 if (of_hasprop(opp_table, "opp-shared")) { 429 TAILQ_FOREACH(table, &cpufreq_dt_tables, next) 430 if (table->phandle == opp_table) 431 return EEXIST; 432 sc->sc_table.phandle = opp_table; 433 TAILQ_INSERT_TAIL(&cpufreq_dt_tables, &sc->sc_table, next); 434 } 435 436 opp_info = cpufreq_dt_lookup_opp_info(opp_table); 437 438 for (opp_node = OF_child(opp_table); opp_node; opp_node = OF_peer(opp_node)) { 439 if (!cpufreq_dt_node_supported(opp_info, opp_table, opp_node)) 440 continue; 441 sc->sc_nopp++; 442 } 443 444 if (sc->sc_nopp == 0) 445 return EINVAL; 446 447 sc->sc_opp = kmem_zalloc(sizeof(*sc->sc_opp) * sc->sc_nopp, KM_SLEEP); 448 index = sc->sc_nopp - 1; 449 for (opp_node = OF_child(opp_table), i = 0; opp_node; opp_node = OF_peer(opp_node), i++) { 450 if (!cpufreq_dt_node_supported(opp_info, opp_table, opp_node)) 451 continue; 452 453 if (of_getprop_uint64(opp_node, "opp-hz", &opp_hz) != 0) 454 return EINVAL; 455 sc->sc_opp[index].freq_khz = (u_int)(opp_hz / 1000); 456 457 opp_uv = fdtbus_get_prop(opp_node, "opp-microvolt", &len); 458 if (opp_uv == NULL) 459 return EINVAL; 460 if (len == 3 * sizeof(uint32_t)) { 461 sc->sc_opp[index].voltage_target_uv = be32toh(opp_uv[0]); 462 sc->sc_opp[index].voltage_min_uv = be32toh(opp_uv[1]); 463 sc->sc_opp[index].voltage_max_uv = be32toh(opp_uv[2]); 464 } else if (len == sizeof(uint32_t)) { 465 u_int voltage_uv = be32toh(opp_uv[0]); 466 sc->sc_opp[index].voltage_target_uv = voltage_uv; 467 sc->sc_opp[index].voltage_min_uv = voltage_uv; 468 sc->sc_opp[index].voltage_max_uv = voltage_uv; 469 } else { 470 return EINVAL; 471 } 472 473 of_getprop_uint32(opp_node, "clock-latency-ns", &sc->sc_opp[index].latency_ns); 474 --index; 475 } 476 477 return 0; 478 } 479 480 static int 481 cpufreq_dt_parse(struct cpufreq_dt_softc *sc) 482 { 483 const int phandle = sc->sc_phandle; 484 int error, i; 485 486 if (of_hasprop(phandle, "cpu-supply")) { 487 sc->sc_supply = fdtbus_regulator_acquire(phandle, "cpu-supply"); 488 if (sc->sc_supply == NULL) { 489 aprint_error_dev(sc->sc_dev, 490 "couldn't acquire cpu-supply\n"); 491 return ENXIO; 492 } 493 } 494 sc->sc_clk = fdtbus_clock_get_index(phandle, 0); 495 if (sc->sc_clk == NULL) { 496 aprint_error_dev(sc->sc_dev, "couldn't acquire clock\n"); 497 return ENXIO; 498 } 499 500 mutex_enter(&cpufreq_dt_tables_lock); 501 if (of_hasprop(phandle, "operating-points")) 502 error = cpufreq_dt_parse_opp(sc); 503 else if (of_hasprop(phandle, "operating-points-v2")) 504 error = cpufreq_dt_parse_opp_v2(sc); 505 else 506 error = EINVAL; 507 mutex_exit(&cpufreq_dt_tables_lock); 508 509 if (error) { 510 if (error != EEXIST) 511 aprint_error_dev(sc->sc_dev, 512 "couldn't parse operating points: %d\n", error); 513 return error; 514 } 515 516 for (i = 0; i < sc->sc_nopp; i++) { 517 aprint_debug_dev(sc->sc_dev, "supported rate: %u.%03u MHz, %u uV\n", 518 sc->sc_opp[i].freq_khz / 1000, 519 sc->sc_opp[i].freq_khz % 1000, 520 sc->sc_opp[i].voltage_target_uv); 521 } 522 523 return 0; 524 } 525 526 static int 527 cpufreq_dt_match(device_t parent, cfdata_t cf, void *aux) 528 { 529 struct fdt_attach_args * const faa = aux; 530 const int phandle = faa->faa_phandle; 531 bus_addr_t addr; 532 533 if (fdtbus_get_reg(phandle, 0, &addr, NULL) != 0) 534 return 0; 535 536 if (!of_hasprop(phandle, "clocks")) 537 return 0; 538 539 if (!of_hasprop(phandle, "operating-points") && 540 !of_hasprop(phandle, "operating-points-v2")) 541 return 0; 542 543 return 1; 544 } 545 546 static void 547 cpufreq_dt_init(device_t self) 548 { 549 struct cpufreq_dt_softc * const sc = device_private(self); 550 int error; 551 552 if ((error = cpufreq_dt_parse(sc)) != 0) 553 return; 554 555 pmf_event_register(sc->sc_dev, PMFE_THROTTLE_ENABLE, cpufreq_dt_throttle_enable, true); 556 pmf_event_register(sc->sc_dev, PMFE_THROTTLE_DISABLE, cpufreq_dt_throttle_disable, true); 557 558 cpufreq_dt_init_sysctl(sc); 559 560 if (sc->sc_nopp > 0) { 561 struct cpufreq_dt_opp * const opp = &sc->sc_opp[0]; 562 563 aprint_normal_dev(sc->sc_dev, "rate: %u.%03u MHz, %u uV\n", 564 opp->freq_khz / 1000, opp->freq_khz % 1000, 565 opp->voltage_target_uv); 566 cpufreq_dt_set_rate(sc, opp->freq_khz); 567 } 568 } 569 570 static int 571 cpufreq_dt_lock_init(void) 572 { 573 mutex_init(&cpufreq_dt_tables_lock, MUTEX_DEFAULT, IPL_NONE); 574 return 0; 575 } 576 577 static void 578 cpufreq_dt_attach(device_t parent, device_t self, void *aux) 579 { 580 static ONCE_DECL(locks); 581 struct cpufreq_dt_softc * const sc = device_private(self); 582 struct fdt_attach_args * const faa = aux; 583 584 RUN_ONCE(&locks, cpufreq_dt_lock_init); 585 586 sc->sc_dev = self; 587 sc->sc_phandle = faa->faa_phandle; 588 589 aprint_naive("\n"); 590 aprint_normal("\n"); 591 592 config_interrupts(self, cpufreq_dt_init); 593 } 594 595 CFATTACH_DECL_NEW(cpufreq_dt, sizeof(struct cpufreq_dt_softc), 596 cpufreq_dt_match, cpufreq_dt_attach, NULL, NULL); 597
Indexes created Sun Oct 25 00:26:45 UTC 2026