| /src/usr.sbin/lpr/lpd/ |
| ttcompat.c | 52 /* Macros to clear/set/test flags. */
53 #define SET(t, f) (t) |= (f)
72 SET(flags, ODDP);
74 SET(flags, EVENP);
76 SET(flags, EVENP|ODDP);
80 SET(flags, PASS8);
82 SET(flags, LITOUT);
89 SET(flags, CBREAK);
91 SET(flags, RAW);
110 SET(iflag, BRKINT|IXON|IMAXBEL)
[all...] |
| /src/sys/arch/vax/consolerl/ |
| anyboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| hkmboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| hksboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| hpmboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| hpsboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| ramboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| rasboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| upmboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| upsboo.com | 8 SET SNAP ON ! Enable ERROR_HALT snapshots
9 SET FBOX OFF ! System will turn on Fbox
|
| /src/sys/arch/mips/cavium/dev/ |
| octeon_ipd.c | 84 SET(ctl_status, IPD_CTL_STATUS_IPD_EN);
103 SET(first_mbuff_skip, (sc->sc_first_mbuff_skip / 8) & IPD_1ST_MBUFF_SKIP_SZ);
109 SET(not_first_mbuff_skip, (sc->sc_not_first_mbuff_skip / 8) &
115 SET(packet_mbuff_size, (FPA_RECV_PKT_POOL_SIZE / 8) &
120 SET(first_next_ptr_back, (sc->sc_first_mbuff_skip / 128) & IPD_1ST_NEXT_PTR_BACK_BACK);
124 SET(second_next_ptr_back, (sc->sc_not_first_mbuff_skip / 128) &
129 SET(sqe_fpa_queue, FPA_WQE_POOL & IPD_WQE_FPA_QUEUE_WQE_QUE);
134 SET(ctl_status,
136 SET(ctl_status, IPD_CTL_STATUS_PBP_EN);
141 * SET(ctl_status, IPD_CTL_STATUS_LEN_M8)
[all...] |
| octeon_pko.c | 82 SET(reg_flags, PKO_REG_FLAGS_ENA_DWB);
83 SET(reg_flags, PKO_REG_FLAGS_ENA_PKO);
96 SET(reg_cmd_buf, __SHIFTIN(sc->sc_cmd_buf_pool, PKO_REG_CMD_BUF_POOL));
97 SET(reg_cmd_buf, __SHIFTIN(sc->sc_cmd_buf_size, PKO_REG_CMD_BUF_SIZE));
108 SET(reg_read_idx, sc->sc_port & PKO_REG_READ_IDX_IDX);
113 SET(mem_queue_qos, __SHIFTIN(sc->sc_port, PKO_MEM_QUEUE_QOS_PID));
114 SET(mem_queue_qos, __SHIFTIN(sc->sc_port, PKO_MEM_QUEUE_QOS_QID));
115 SET(mem_queue_qos, enable ? PKO_MEM_QUEUE_QOS_QOS_MASK : 0);
141 SET(mem_queue_ptrs, PKO_MEM_QUEUE_PTRS_TAIL);
142 SET(mem_queue_ptrs, __SHIFTIN(0, PKO_MEM_QUEUE_PTRS_IDX))
[all...] |
| octeon_pip.c | 212 SET(prt_cfg, PIP_PRT_CFGN_LENERR_EN);
213 SET(prt_cfg, PIP_PRT_CFGN_MAXERR_EN);
214 SET(prt_cfg, PIP_PRT_CFGN_MINERR_EN);
221 SET(prt_cfg, __SHIFTIN(sc->sc_port, PIP_PRT_CFGN_QOS));
226 SET(prt_cfg, PIP_PRT_CFGN_CRC_EN);
230 SET(prt_tag, PIP_PRT_TAGN_INC_PRT);
241 SET(prt_tag, __SHIFTIN(PIP_PRT_TAGN_TCP6_TAG_ORDERED, PIP_PRT_TAGN_TCP6_TAG));
242 SET(prt_tag, __SHIFTIN(PIP_PRT_TAGN_TCP4_TAG_ORDERED, PIP_PRT_TAGN_TCP4_TAG));
243 SET(prt_tag, __SHIFTIN(PIP_PRT_TAGN_IP6_TAG_ORDERED, PIP_PRT_TAGN_IP6_TAG));
244 SET(prt_tag, __SHIFTIN(PIP_PRT_TAGN_IP4_TAG_ORDERED, PIP_PRT_TAGN_IP4_TAG))
[all...] |
| octeon_gmx.c | 389 SET(prt_cfg, PRTN_CFG_EN);
439 SET(ovr_bp, __SHIFTIN(__BIT(index), TX_OVR_BP_BP));
441 SET(ovr_bp, __SHIFTIN(__BIT(index), TX_OVR_BP_IGN_FULL));
443 SET(ovr_bp, __SHIFTIN(__BIT(index), TX_OVR_BP_EN));
446 SET(ovr_bp, __SHIFTIN(__BIT(index), TX_OVR_BP_IGN_FULL));
469 SET(tx_int_xxx,
484 SET(rx_int_xxx, 0 |
535 SET(tmp, rx_frm_ctl);
585 SET(ctl, RXN_ADR_CTL_BCST);
592 SET(ctl, RXN_ADR_CTL_CAM_MODE)
[all...] |
| /src/sys/compat/common/ |
| tty_43.c | 274 SET(tp->t_cflag, HUPCL);
296 SET(flags, TANDEM);
298 SET(flags, CRMOD);
302 SET(flags, ODDP);
304 SET(flags, EVENP);
306 SET(flags, ANYP);
313 SET(flags, CBREAK);
315 SET(flags, RAW);
319 SET(flags, ISSET(tp->t_flags, LITOUT|PASS8));
322 SET(flags, LITOUT)
[all...] |
| /src/sys/external/isc/libsodium/dist/test/default/ |
| wintest.bat | 16 if "%2" == "x64" (SET ARCH=x64) else (SET ARCH=Win32)
17 SET CFLAGS=/nologo /DTEST_SRCDIR=\".\" /I..\..\src\libsodium\include\sodium /I..\..\src\libsodium\include /I..\quirks
18 SET LDFLAGS=/link /LTCG advapi32.lib ..\..\Build\%1\%ARCH%\libsodium.lib
26 SET CFLAGS=%CFLAGS% /MD /Ox
27 SET PATH=..\..\Build\%1\%ARCH%;%PATH%
30 SET CFLAGS=%CFLAGS% /MT /Ox /DSODIUM_STATIC /DSODIUM_EXPORT=
33 SET CFLAGS=%CFLAGS% /GS /MDd /Od
34 SET PATH=..\..\Build\%1\%ARCH%;%PATH%
37 SET CFLAGS=%CFLAGS% /GS /MTd /Od /DSODIUM_STATIC /DSODIUM_EXPORT
[all...] |
| /src/libexec/getty/ |
| subr.c | 84 np->set = 0;
86 np->set = 1;
92 fp->set = 0;
94 fp->set = 1;
105 printf("cgetflags: %s='%c' set='%c'\n", fp->field,
106 fp->value + '0', fp->set + '0');
122 if (np->set)
125 if (fp->set)
142 if (!np->set)
145 if (!fp->set)
686 struct pollfd set[1]; local in function:autobaud
[all...] |
| /src/sys/arch/shark/shark/ |
| sequoia.c | 136 int sequoia_index_cache = -1; /* set to silly value so that we dont cache on init */
181 SET(seqReg,SEQPSR1_M_TAGDEN); /* enable pc[4:9] */
195 SET(seqReg,LED_DEBUG_YELLOW_BIT);
209 SET(seqReg,SCR_POWER_DIR); /* output */
210 SET(seqReg,SCR_RESET_DIR); /* output */
214 SET(seqReg,SCR_RESET); /* 0V to card */
224 SET(seqReg,SEQ2PSR_M_DPBUSEN);
234 SET(seqReg,SCR_BUGA_DIR); /* output */
235 SET(seqReg,SCR_DATA_OUT_DIR); /* output */
236 SET(seqReg,SCR_CLOCK_DIR); /* output *
[all...] |
| /src/sys/external/isc/libsodium/dist/builds/msvc/build/ |
| buildbase.bat | 4 SET solution=%1
5 SET version=%2
6 SET log=build_%version%.log
7 SET tools=Microsoft Visual Studio %version%.0\VC\vcvarsall.bat
8 IF %version% == 15 SET tools=Microsoft Visual Studio\2017\Community\VC\Auxiliary\Build\vcvarsall.bat
9 SET environment="%programfiles(x86)%\%tools%"
10 IF NOT EXIST %environment% SET environment="%programfiles%\%tools%"
|
| /src/sys/external/bsd/compiler_rt/dist/lib/tsan/rtl/ |
| tsan_md5.cc | 27 #define SET(n) \
30 SET(n)
58 STEP(F, a, b, c, d, SET(0), 0xd76aa478, 7)
59 STEP(F, d, a, b, c, SET(1), 0xe8c7b756, 12)
60 STEP(F, c, d, a, b, SET(2), 0x242070db, 17)
61 STEP(F, b, c, d, a, SET(3), 0xc1bdceee, 22)
62 STEP(F, a, b, c, d, SET(4), 0xf57c0faf, 7)
63 STEP(F, d, a, b, c, SET(5), 0x4787c62a, 12)
64 STEP(F, c, d, a, b, SET(6), 0xa8304613, 17)
65 STEP(F, b, c, d, a, SET(7), 0xfd469501, 22
[all...] |
| /src/sys/dev/ic/ |
| z8530tty.c | 374 /* Set console magic to BREAK */
447 SET(cs->cs_preg[1], ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE);
492 SET(zst->zst_rx_flags, RX_IBUF_BLOCKED);
495 /* Clear any break condition set with TIOCSBRK. */
596 SET(t.c_cflag, CLOCAL);
598 SET(t.c_cflag, CRTSCTS);
600 SET(t.c_cflag, CDTRCTS);
602 SET(t.c_cflag, MDMBUF);
612 SET(cs->cs_preg[1], ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE);
868 * If nothing is being transmitted, set up new current values
[all...] |
| com.c | 94 * We need to know if cn_check_magic triggered debugger, so set a flag.
435 /* Already set by com_init_regs */
540 /* Turn on line break interrupt, set carrier. */
548 SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
638 SET(sc->sc_hwflags, COM_HW_CONSOLE);
641 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
652 SET(sc->sc_hwflags, COM_HW_FIFO);
658 SET(sc->sc_hwflags, COM_HW_FIFO);
664 SET(sc->sc_hwflags, COM_HW_FIFO);
670 SET(sc->sc_hwflags, COM_HW_FIFO)
[all...] |
| /src/sys/dev/usb/ |
| uvscom.c | 266 aprint_error_dev(self, "failed to set configuration, err=%s\n",
338 /* ucaa_bulkin, ucaa_bulkout set above */
559 SET(sc->sc_lcr, UVSCOM_DTR);
578 SET(sc->sc_lcr, UVSCOM_RTS);
592 uvscom_set_line(sc, SET(sc->sc_lcr, UVSCOM_BREAK));
673 SET(ls, UVSCOM_STOP_BIT_2);
675 SET(ls, UVSCOM_STOP_BIT_1);
679 SET(ls, UVSCOM_PARITY_ODD);
681 SET(ls, UVSCOM_PARITY_EVEN);
683 SET(ls, UVSCOM_PARITY_NONE)
[all...] |
| /src/sys/arch/evbarm/dev/ |
| plcom.c | 111 * We need to know if cn_check_magic triggered debugger, so set a flag.
443 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
445 /* Turn on line break interrupt, set carrier. */
448 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
459 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
460 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr));
498 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE);
499 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
508 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
575 SET(sc->sc_hwflags, PLCOM_HW_FIFO)
[all...] |
| /src/sys/arch/mips/sibyte/dev/ |
| sbjcn.c | 315 SET(ch->ch_hwflags, SBJCN_HW_CONSOLE);
316 SET(ch->ch_swflags, TIOCFLAG_SOFTCAR);
352 SET(ch->ch_hwflags, SBJCN_HW_KGDB);
362 SET(ch->ch_hwflags, SBJCN_HW_DEV_OK);
428 /* Turn on line break interrupt, set carrier. */
432 SET(ch->ch_oports, ch->ch_o_dtr | ch->ch_o_rts);
469 SET(ch->ch_rx_flags, RX_IBUF_BLOCKED);
472 /* Clear any break condition set with TIOCSBRK. */
559 SET(t.c_cflag, CLOCAL);
561 SET(t.c_cflag, CRTSCTS)
[all...] |
