| /src/sys/arch/hpcmips/tx/ |
| tx39irreg.h | 46 #define TX39_IRCTRL1_BAUDVAL(cr) \
47 (((cr) >> TX39_IRCTRL1_BAUDVAL_SHIFT) & \
49 #define TX39_IRCTRL1_BAUDVAL_SET(cr, val) \
50 ((cr) | (((val) << TX39_IRCTRL1_BAUDVAL_SHIFT) & \
52 #define TX39_IRCTRL1_BAUDVAL_CLR(cr) \
53 ((cr) &= ~(TX39_IRCTRL1_BAUDVAL_MASK << TX39_IRCTRL1_BAUDVAL_SHIFT))
69 #define TX39_IRCTRL2_PER_SET(cr, val) \
70 ((cr) | (((val) << TX39_IRCTRL2_PER_SHIFT) & \
72 #define TX39_IRCTRL2_PER_CLR(cr) \
73 ((cr) &= ~(TX39_IRCTRL2_PER_MASK << TX39_IRCTRL2_PER_SHIFT)
[all...] |
| tx39biureg.h | 114 #define TX39_MEMCONFIG0_BANK1CONF(cr) \
115 (((cr) >> TX39_MEMCONFIG0_BANK1CONF_SHIFT) & \
117 #define TX39_MEMCONFIG0_BANK1CONF_SET(cr, val) \
118 ((cr) | (((val) << TX39_MEMCONFIG0_BANK1CONF_SHIFT) & \
122 #define TX39_MEMCONFIG0_BANK0CONF(cr) \
123 (((cr) >> TX39_MEMCONFIG0_BANK0CONF_SHIFT) & \
125 #define TX39_MEMCONFIG0_BANK0CONF_SET(cr, val) \
126 ((cr) | (((val) << TX39_MEMCONFIG0_BANK0CONF_SHIFT) & \
135 #define TX39_MEMCONFIG0_ROWSEL1(cr) \
136 (((cr) >> TX39_MEMCONFIG0_ROWSEL1_SHIFT) &
[all...] |
| tx3912videoreg.h | 59 #define TX3912_VIDEOCTRL1_LINECNT(cr) \
60 (((cr) >> TX3912_VIDEOCTRL1_LINECNT_SHIFT) & \
70 #define TX3912_VIDEOCTRL1_BAUDVAL(cr) \
71 (((cr) >> TX3912_VIDEOCTRL1_BAUDVAL_SHIFT) & \
73 #define TX3912_VIDEOCTRL1_BAUDVAL_SET(cr, val) \
74 ((cr) | (((val) << TX3912_VIDEOCTRL1_BAUDVAL_SHIFT) & \
80 #define TX3912_VIDEOCTRL1_VIDDONEVAL(cr) \
81 (((cr) >> TX3912_VIDEOCTRL1_VIDDONEVAL_SHIFT) & \
83 #define TX3912_VIDEOCTRL1_VIDDONEVAL_SET(cr, val) \
84 ((cr) | (((val) << TX3912_VIDEOCTRL1_VIDDONEVAL_SHIFT) &
[all...] |
| tx39spireg.h | 48 #define TX39_SPICTRL_DELAYVAL(cr) \
49 (((cr) >> TX39_SPICTRL_DELAYVAL_SHIFT) & \
51 #define TX39_SPICTRL_DELAYVAL_SET(cr, val) \
52 ((cr) | (((val) << TX39_SPICTRL_DELAYVAL_SHIFT) & \
57 #define TX39_SPICTRL_BAUDRATE(cr) \
58 (((cr) >> TX39_SPICTRL_BAUDRATE_SHIFT) & \
60 #define TX39_SPICTRL_BAUDRATE_SET(cr, val) \
61 ((cr) | (((val) << TX39_SPICTRL_BAUDRATE_SHIFT) & \
75 #define TX39_SPICTRL_TXDATA_SET(cr, val) \
76 ((cr) | (((val) << TX39_SPICTRL_TXDATA_SHIFT) &
[all...] |
| tx39sibreg.h | 61 #define TX39_SIBSIZE_SNDSIZE_SET(cr, val) \
62 ((cr) | (((((val) >> 2) - 1) << TX39_SIBSIZE_SND_SHIFT) & \
64 #define TX39_SIBSIZE_TELSIZE_SET(cr, val) \
65 ((cr) | (((((val) >> 2) - 1) << TX39_SIBSIZE_TEL_SHIFT) & \
95 #define TX39_SIBCTRL_SCLKDIV(cr) \
96 (((cr) >> TX39_SIBCTRL_SCLKDIV_SHIFT) & \
98 #define TX39_SIBCTRL_SCLKDIV_SET(cr, val) \
99 ((cr) | (((val) << TX39_SIBCTRL_SCLKDIV_SHIFT) & \
106 #define TX39_SIBCTRL_TELFSDIV(cr) \
107 (((cr) >> TX39_SIBCTRL_TELFSDIV_SHIFT) &
[all...] |
| tx39ioreg.h | 63 #define TX391X_IOCTRL_IODEBSEL(cr) \
64 (((cr) >> TX391X_IOCTRL_IODEBSEL_SHIFT) & \
66 #define TX391X_IOCTRL_IODEBSEL_SET(cr, val) \
67 ((cr) | (((val) << TX391X_IOCTRL_IODEBSEL_SHIFT) & \
72 #define TX391X_IOCTRL_IODIREC(cr) \
73 (((cr) >> TX391X_IOCTRL_IODIREC_SHIFT) & \
75 #define TX391X_IOCTRL_IODIREC_SET(cr, val) \
76 ((cr) | (((val) << TX391X_IOCTRL_IODIREC_SHIFT) & \
81 #define TX391X_IOCTRL_IODOUT(cr) \
82 (((cr) >> TX391X_IOCTRL_IODOUT_SHIFT) &
[all...] |
| tx39powerreg.h | 49 #define TX39_POWERCTRL_VIDRF(cr) \
50 (((cr) >> TX39_POWERCTRL_VIDRF_SHIFT) & \
52 #define TX39_POWERCTRL_VIDRF_SET(cr, val) \
53 ((cr) | (((val) << TX39_POWERCTRL_VIDRF_SHIFT) & \
67 #define TX39_POWERCTRL_STPTIMERVAL(cr) \
68 (((cr) >> TX39_POWERCTRL_STPTIMERVAL_SHIFT) & \
70 #define TX39_POWERCTRL_STPTIMERVAL_SET(cr, val) \
71 ((cr) | (((val) << TX39_POWERCTRL_STPTIMERVAL_SHIFT) & \
|
| tx39clockreg.h | 44 #define TX39_CLOCK_CHICLKDIV(cr) \
45 (((cr) >> TX39_CLOCK_CHICLKDIV_SHIFT) & \
47 #define TX39_CLOCK_CHICLKDIV_SET(cr, val) \
48 ((cr) | (((val) << TX39_CLOCK_CHICLKDIV_SHIFT) & \
75 #define TX39_CLOCK_SIBMCLKDIV(cr) \
76 (((cr) >> TX39_CLOCK_SIBMCLKDIV_SHIFT) & \
78 #define TX39_CLOCK_SIBMCLKDIV_SET(cr, val) \
79 ((cr) | (((val) << TX39_CLOCK_SIBMCLKDIV_SHIFT) & \
86 #define TX39_CLOCK_CSERDIV(cr) \
87 (((cr) >> TX39_CLOCK_CSERDIV_SHIFT) &
[all...] |
| tx39timerreg.h | 72 #define TX39_TIMERRTCHI(cr) ((cr) & TX39_TIMERRTCHI_MASK)
87 #define TX39_TIMERALARMHI(cr) ((cr) & TX39_TIMERALARMHI_MASK)
107 #define TX39_TIMERPERIODIC_PERCNT(cr) \
108 (((cr) >> TX39_TIMERPERIODIC_PERCNT_SHIFT) & \
113 #define TX39_TIMERPERIODIC_PERVAL(cr) \
114 (((cr) >> TX39_TIMERPERIODIC_PERVAL_SHIFT) & \
116 #define TX39_TIMERPERIODIC_PERVAL_SET(cr, val) \
117 ((cr) | (((val) << TX39_TIMERPERIODIC_PERVAL_SHIFT) &
[all...] |
| tx39uartreg.h | 117 #define TX39_UARTCTRL2_BAUDRATE_SET(cr, val) \
118 ((cr) | (((val) << TX39_UARTCTRL2_BAUDRATE_SHIFT) & \
126 #define TX39_UARTDMACTRL1_DMASTARTVAL_SET(cr, val) \
127 ((cr) | ((val) & TX39_UARTDMACTRL1_DMASTARTVAL_MASK))
134 #define TX39_UARTDMACTRL2_DMALENGTH_SET(cr, val) \
135 ((cr) | ((val) & TX39_UARTDMACTRL1_DMALENGTH_MASK))
143 #define TX39_UARTDMACNT_DMACNT(cr) \
144 ((cr) & TX39_UARTDMACNT_DMACNT_MASK)
153 #define TX39_UARTTXHOLD_TXDATA_SET(cr, val) \
154 ((cr) | ((val) & TX39_UARTTXHOLD_TXDATA_MASK)
[all...] |
| tx39icureg.h | 347 #define TX39_INTRSTATUS5_IOPOSINT(cr) \
348 (((cr) >> TX39_INTRSTATUS5_IOPOSINT_SHIFT) & \
350 #define TX39_INTRSTATUS5_IOPOSINT_SET(cr, val) \
351 ((cr) | (((val) << TX39_INTRSTATUS5_IOPOSINT_SHIFT) & \
356 #define TX39_INTRSTATUS5_IONEGINT(cr) \
357 (((cr) >> TX39_INTRSTATUS5_IONEGINT_SHIFT) & \
359 #define TX39_INTRSTATUS5_IONEGINT_SET(cr, val) \
360 ((cr) | (((val) << TX39_INTRSTATUS5_IONEGINT_SHIFT) & \
372 #define TX39_INTRSTATUS6_INTVECT(cr) \
373 (((cr) >> TX39_INTRSTATUS6_INTVECT_SHIFT) &
[all...] |
| /src/sys/arch/hpcsh/dev/hd64461/ |
| hd64461videoreg.h | 83 #define HD64461_LCDLDR3_CS(cr) \
84 (((cr) >> HD64461_LCDLDR3_CS_SHIFT) & \
86 #define HD64461_LCDLDR3_CS_SET(cr, val) \
87 ((cr) | (((val) << HD64461_LCDLDR3_CS_SHIFT) & \
90 #define HD64461_LCDLDR3_CG(cr) \
91 ((cr) & HD64461_LCDLDR3_CG_MASK)
92 #define HD64461_LCDLDR3_CG_CLR(cr) \
93 ((cr) & ~HD64461_LCDLDR3_CG_MASK)
94 #define HD64461_LCDLDR3_CG_SET(cr, val) \
95 ((cr) | ((val) & HD64461_LCDLDR3_CG_MASK)
[all...] |
| /src/sys/arch/hpcmips/dev/ |
| ucb1200reg.h | 67 #define UCB1200_TELECOMCTRLA_DIV(cr) \
68 (((cr) >> UCB1200_TELECOMCTRLA_DIV_SHIFT) & \
70 #define UCB1200_TELECOMCTRLA_DIV_SET(cr, val) \
71 ((cr) | (((val) << UCB1200_TELECOMCTRLA_DIV_SHIFT) & \
94 #define UCB1200_AUDIOCTRLA_DIV(cr) \
95 (((cr) >> UCB1200_AUDIOCTRLA_DIV_SHIFT) & \
97 #define UCB1200_AUDIOCTRLA_DIV_SET(cr, val) \
98 ((cr) | (((val) << UCB1200_AUDIOCTRLA_DIV_SHIFT) & \
103 #define UCB1200_AUDIOCTRLA_GAIN(cr) \
104 (((cr) >> UCB1200_AUDIOCTRLA_GAIN_SHIFT) &
[all...] |
| plumpcmciareg.h | 181 #define PLUM_PCMCIA_MEMWINCTRL_MAP(cr) \
182 (((cr) >> PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT) & \
184 #define PLUM_PCMCIA_MEMWINCTRL_MAP_SET(cr, val) \
185 ((cr) | (((val) << PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT) & \
187 #define PLUM_PCMCIA_MEMWINCTRL_MAP_CLEAR(cr) \
188 ((cr) &= ~(PLUM_PCMCIA_MEMWINCTRL_MAP_MASK << PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT))
201 #define PLUM_PCMCIA_MEMWINCTRL_TIMING(cr) \
202 (((cr) >> PLUM_PCMCIA_MEMWINCTRL_TIMING_SHIFT) & \
204 #define PLUM_PCMCIA_MEMWINCTRL_TIMING_SET(cr, val) \
205 ((cr) | (((val) << PLUM_PCMCIA_MEMWINCTRL_TIMING_SHIFT) &
[all...] |
| /src/sys/arch/hpc/hpc/ |
| config_hook.c | 76 struct hook_rec *hr, *cr, *prev_hr; local in function:config_hook
132 TAILQ_FOREACH(cr, &call_list, hr_link) {
133 if (cr->hr_type == type && cr->hr_id == id) {
134 if (cr->hr_func != NULL &&
135 cr->hr_mode != mode) {
138 type, id, cr->hr_mode);
140 cr->hr_ctx = ctx;
141 cr->hr_func = func;
142 cr->hr_mode = mode
203 struct hook_rec *cr, *hr; local in function:config_connect
240 struct hook_rec *cr = (struct hook_rec*)crx; local in function:config_disconnect
253 struct hook_rec *cr = (struct hook_rec*)crx; local in function:config_connected_call
[all...] |
| /src/sys/dev/i2c/ |
| motoi2c.c | 168 motoi2c_busy_wait(struct motoi2c_softc *sc, uint8_t cr)
179 DPRINTF(("%s: timeout (sr=%#x, cr=%#x)\n",
186 if ((cr & CR_MTX) && (sr & SR_RXAK)) {
213 uint8_t cr; local in function:motoi2c_exec
217 cr = I2C_READ(I2CCR);
220 DPRINTF(("%s(%#x,%#x,%p,%zu,%p,%zu,%#x): sr=%#x cr=%#x\n",
222 sr, cr));
225 if ((cr & CR_MSTA) == 0 && (sr & SR_MBB) != 0) {
239 cr = sc->sc_enable_mask | CR_MTX | CR_MSTA;
240 I2C_WRITE(I2CCR, cr);
[all...] |
| /src/sys/arch/arm/imx/ |
| imxpwm.c | 70 uint32_t cr, ocr; local in function:imxpwm_enable
72 ocr = cr = PWM_READ(sc, PWM_CR);
74 cr |= PWM_CR_EN;
76 cr &= ~PWM_CR_EN;
78 if (cr != ocr)
79 PWM_WRITE(sc, PWM_CR, cr);
88 uint32_t cr, sar, pr; local in function:imxpwm_get_config
90 cr = PWM_READ(sc, PWM_CR);
94 const int div = __SHIFTOUT(cr, PWM_CR_PRESCALER) + 1;
95 const int polarity = __SHIFTOUT(cr, PWM_CR_POUTC)
111 uint32_t cr, sar, pr; local in function:imxpwm_set_config
[all...] |
| /src/sys/arch/hpcarm/dev/ |
| uda1341.c | 170 int cr; local in function:uda1341_output_high
173 cr = GPIO_READ(sc, SAGPIO_PDR) | (L3_DATA | L3_MODE | L3_CLK);
174 GPIO_WRITE(sc, SAGPIO_PDR, cr);
180 int cr; local in function:uda1341_output_low
182 cr = GPIO_READ(sc, SAGPIO_PDR);
183 cr &= ~(L3_DATA | L3_MODE | L3_CLK);
184 GPIO_WRITE(sc, SAGPIO_PDR, cr);
190 int cr; local in function:uda1341_L3_init
192 cr = GPIO_READ(sc, SAGPIO_AFR);
193 cr &= ~(L3_DATA | L3_MODE | L3_CLK)
202 int cr; local in function:uda1341_init
[all...] |
| /src/sbin/luactl/ |
| luactl.c | 150 struct lua_create cr; local in function:create
152 strlcpy(cr.name, name, sizeof(cr.name));
154 strlcpy(cr.desc, desc, sizeof(cr.desc));
156 cr.desc[0] = '\0';
158 if (ioctl(devfd, LUACREATE, &cr) == -1)
170 struct lua_create cr; local in function:destroy
172 strlcpy(cr.name, name, sizeof(cr.name))
[all...] |
| /src/sys/arch/powerpc/include/ |
| reg.h | 54 int cr; /* Condition Register */ member in struct:reg
|
| /src/sys/dev/ic/ |
| pl050.c | 111 uint32_t cr; local in function:plkmi_slot_enable
113 cr = PLKMI_READ(sc, KMICR);
115 cr |= KMIEN;
117 cr &= ~KMIEN;
118 PLKMI_WRITE(sc, KMICR, cr);
125 uint32_t cr; local in function:plkmi_set_poll
127 cr = PLKMI_READ(sc, KMICR);
129 cr &= ~KMIRXINTREN;
131 cr |= KMIRXINTREN;
132 PLKMI_WRITE(sc, KMICR, cr);
[all...] |
| /src/libexec/comsat/ |
| comsat.c | 227 const char *cr = ep->line; local in function:notify
229 if (strncmp(cr, "pts/", 4) == 0)
230 cr += 4;
231 if (strchr(cr, '/')) {
262 cr = (ttybuf.c_oflag & ONLCR) && (ttybuf.c_oflag & OPOST) ?
275 cr, ep->name, (int)sizeof(hostname), hostname, cr, cr);
276 jkfprintf(tp, ep->name, offset, cr);
282 jkfprintf(FILE *tp, const char *name, off_t offset, const char *cr)
[all...] |
| /src/sys/dev/rcons/ |
| raster_text.c | 156 rf->cache->cr[c] = (struct raster*) 0;
162 struct raster* cr; local in function:raster_textn
165 cr = rf->cache->cr[ch];
167 if ( cr != (struct raster*) 0 )
173 charrast = cr;
179 cr, 0, 0, charrast->width,
183 charrast = cr;
190 cr = raster_alloc(
192 if ( cr != (struct raster*) 0
[all...] |
| /src/sys/arch/ia64/ia64/ |
| exception.S | 122 mov r25 = cr.iip
128 mov r26 = cr.ifa
134 mov r25 = cr.isr
140 mov r26 = cr.ipsr
146 mov r25 = cr.itir
152 mov r26 = cr.iipa
158 mov r25 = cr.ifs
164 mov r26 = cr.iim
170 mov r25 = cr.iha
239 * normally is cr.ifa, but some interruptions se
[all...] |
| /src/sys/conf/ |
| debugsyms.c | 38 struct kauth_cred *cr = (kauth_cred_t)vp; local in function:_debugsym_dummyfunc
40 return cr->cr_uid ? ((lwp_t *)vp->v_mount)->l_proc : NULL;
|
