| /src/sys/arch/evbarm/ixm1200/ |
| nappi_nppb.c | 60 #define CSR_READ_2(sc, reg) \
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| /src/sys/arch/sandpoint/stand/altboot/ |
| fxp.c | 92 #define CSR_READ_2(l, r) in16rb((l)->iobase+(r))
449 if ((CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) &
487 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) &
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| kse.c | 49 #define CSR_READ_2(l, r) in16rb((l)->csr+(r))
138 i = CSR_READ_2(l, MARL);
141 i = CSR_READ_2(l, MARM);
144 i = CSR_READ_2(l, MARH);
157 val = CSR_READ_2(l, P1SR);
267 val = CSR_READ_2(l, P1SR);
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| pcn.c | 49 #define CSR_READ_2(l, r) in16rb((l)->csr+(r))
156 (void)CSR_READ_2(l, PCN_16RESET);
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| nvt.c | 50 #define CSR_READ_2(l, r) in16rb((l)->csr+(r))
355 v = CSR_READ_2(l, VR_MIIDATA);
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| rge.c | 50 #define CSR_READ_2(l, r) in16rb((l)->csr+(r))
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| stg.c | 44 #define CSR_READ_2(l, r) in16rb((l)->csr+(r))
197 addr[i] = le16toh(CSR_READ_2(l, STGE_EepromData));
245 CSR_READ_2(l, STGE_DebugCtrl) | 0x0200);
247 CSR_READ_2(l, STGE_DebugCtrl) | 0x0010);
249 CSR_READ_2(l, STGE_DebugCtrl) | 0x0020);
552 if ((CSR_READ_2(l, STGE_EepromCtrl) & EC_EepromBusy) == 0)
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| skg.c | 49 #define CSR_READ_2(l, r) in16rb((l)->csr+(r))
321 reg = CSR_READ_2(l, YUKON_GPCR);
408 v = CSR_READ_2(l, YUKON_SMICR);
414 return CSR_READ_2(l, YUKON_SMIDR);
428 v = CSR_READ_2(l, YUKON_SMICR);
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| vge.c | 50 #define CSR_READ_2(l, r) in16rb((l)->csr+(r))
437 v = CSR_READ_2(l, VR_MIIDATA);
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| /src/sys/dev/ic/ |
| anvar.h | 53 #define CSR_READ_2(sc, reg) \
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| i82557var.h | 354 #define CSR_READ_2(sc, reg) \
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| wivar.h | 243 #define CSR_READ_2(sc, reg) \
265 #define CSR_READ_2(sc, reg) \
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| rtl81x9var.h | 287 #define CSR_READ_2(sc, reg) \
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| com.c | 149 #define CSR_READ_2(r, o) \
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| bwivar.h | 82 #define CSR_READ_2(sc, reg) \
97 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits))
102 CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits))
107 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits))
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| /src/sys/dev/pci/ |
| if_vtevar.h | 157 #define CSR_READ_2(_sc, reg) \
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| if_vr.c | 295 #define CSR_READ_2(sc, reg) \
338 CSR_READ_2(sc, reg) | (x))
342 CSR_READ_2(sc, reg) & ~(x))
425 if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON | VR_CMD_RX_ON))
440 if (!(CSR_READ_2(sc, VR_COMMAND) &
529 if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
813 if ((CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON) == 0)
859 if ((CSR_READ_2(sc, VR_COMMAND) &
929 status = CSR_READ_2(sc, VR_ISR);
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| if_ipwreg.h | 316 #define CSR_READ_2(sc, reg) \
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| if_stge.c | 232 #define CSR_READ_2(_sc, reg) \
585 enaddr[0] = CSR_READ_2(sc, STGE_StationAddress0) & 0xff;
586 enaddr[1] = CSR_READ_2(sc, STGE_StationAddress0) >> 8;
587 enaddr[2] = CSR_READ_2(sc, STGE_StationAddress1) & 0xff;
588 enaddr[3] = CSR_READ_2(sc, STGE_StationAddress1) >> 8;
589 enaddr[4] = CSR_READ_2(sc, STGE_StationAddress2) & 0xff;
590 enaddr[5] = CSR_READ_2(sc, STGE_StationAddress2) >> 8;
1102 if ((CSR_READ_2(sc, STGE_IntStatus) & IS_InterruptStatus) == 0)
1106 isr = CSR_READ_2(sc, STGE_IntStatusAck);
1450 (u_int) CSR_READ_2(sc, STGE_FramesLostRxErrors))
[all...] |
| if_vge.c | 269 #define CSR_READ_2(sc, reg) \
277 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (x))
284 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(x))
397 word = CSR_READ_2(sc, VGE_EERDDAT);
496 *val = CSR_READ_2(sc, VGE_MIIDATA);
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| if_iwireg.h | 536 #define CSR_READ_2(sc, reg) \
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| if_kse.c | 69 #define CSR_READ_2(sc, off) \
436 i = CSR_READ_2(sc, MARL);
439 i = CSR_READ_2(sc, MARM);
442 i = CSR_READ_2(sc, MARH);
801 i = CSR_READ_2(sc, SGCR3);
1331 uint16_t p1sr = CSR_READ_2(sc, P1SR);
1382 printf("p1sr: %04x, p2sr: %04x\n", CSR_READ_2(sc, P1SR), CSR_READ_2(sc, P2SR));
1425 *val = CSR_READ_2(sc, phy1csr[reg]);
1448 uint16_t p1sr = CSR_READ_2(sc, P1SR)
[all...] |
| if_agereg.h | 858 #define CSR_READ_2(sc, reg) \
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| if_alereg.h | 957 #define CSR_READ_2(_sc, reg) \
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| /src/sys/arch/evbarm/stand/boot2440/ |
| dm9000.c | 141 CSR_READ_2(struct local *l, int reg)
348 (void) CSR_READ_2(l, MRCMDX); /* dummy read */
349 mark = CSR_READ_2(l, MRCMDX); /* mark in [7:0] */
357 stat = CSR_READ_2(l, MRCMD); /* stat in [15:8] */
358 len = CSR_READ_2(l, MRCMD);
363 (void) CSR_READ_2(l, MRCMD);
373 val = CSR_READ_2(l, MRCMD);
380 (void) CSR_READ_2(l, MRCMD);
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