| /src/tests/usr.bin/xlint/lint1/ |
| msg_087.c | 8 extern long counter;
13 /* expect+1: warning: static 'counter' hides external declaration with type 'long' [87] */
14 static int counter; local in function:count
15 return counter++;
|
| msg_045.c | 8 struct counter { struct
14 /* expect+4: warning: base type is really 'struct counter' [45] */
15 /* expect+3: warning: declaration of 'union counter' introduces new type in C90 or later [44] */
16 /* expect+2: error: 'counter' has incomplete type 'incomplete union counter' [31] */
17 /* expect+1: warning: union 'counter' never defined [234] */
18 union counter counter; local in function:function
20 counter.value++;
|
| /src/sys/arch/arm/imx/ |
| imxclock.c | 135 uint32_t counter; local in function:imx_epit_get_timecount
140 counter = bus_space_read_4(imxclock->sc_iot, imxclock->sc_ioh, EPIT_EPITCNT);
144 return base - counter;
|
| /src/sys/net/npf/ |
| npf_ext_rndblock.c | 61 unsigned long counter; member in struct:__anon3216c4170108
117 * Use atomic operation to increment the counter.
119 c = atomic_inc_ulong_nv(&rndblock->counter);
|
| /src/tests/rump/kernspace/ |
| workqueue.c | 50 int counter; member in struct:test_softc
65 ++sc->counter;
84 sc->counter = 0;
116 KASSERT(sc->counter == ITERATIONS);
132 KASSERT(sc->counter == i);
135 KASSERT(sc->counter == (i + 1));
138 KASSERT(sc->counter == ITERATIONS);
160 KASSERT(sc->counter == i);
166 KASSERT(sc->counter == (i + 2));
169 KASSERT(sc->counter == 2*ITERATIONS)
[all...] |
| /src/sys/arch/arm/xscale/ |
| becc_timer.c | 83 * Since the timer interrupts when the counter underflows, we need to
201 uint32_t counter, base; local in function:becc_get_timecount
205 counter = BECC_CSR_READ(BECC_TCVRA);
209 return base - counter;
|
| ixp425_timer.c | 206 u_int savedints, base, counter; local in function:ixpclk_get_timecount
210 counter = GET_TIMER_VALUE(ixpclk_sc);
213 return base - counter;
|
| /src/sys/arch/ia64/stand/ia64/ski/ |
| efi_stub.c | 223 static uint32_t counter = 0; local in function:GetNextHighMonotonicCount
225 *high = counter++;
|
| /src/sys/arch/virt68k/virt68k/ |
| clock.c | 86 struct evcnt counter; member in struct:clock_vars
133 evcnt_attach_dynamic(&virt68k_clocks[ca->ca_which].counter,
226 &virt68k_clocks[i].counter,
|
| /src/sys/arch/sparc/sparc/ |
| timer_msiiep.c | 97 static struct counter { struct
110 .tc_name = "timer-counter",
118 * counter is reset to 1 when new limit is written.
141 /* Put processor counter in "counter" mode */
168 * Set counter interrupt priority assignment:
169 * upper 4 bits are for system counter: level 10
170 * lower 4 bits are for processor counter: level 14
206 * timer_get_timecount provide current counter value
211 struct counter *ctr = (struct counter *)tc->tc_priv
[all...] |
| timer.c | 58 * the timer register (aka system counter). The statclock is provided by
59 * per CPU counter register(s) (aka processor counter(s)).
87 static struct counter { struct
89 volatile u_int *cntreg; /* counter register to read */
108 .tc_name = "timer-counter",
114 * timer_get_timecount provide current counter value
164 * This handles early-boot cases where the counter resets twice
212 /* Reset counter register by writing some large limit value */
284 * The sun4m OPENPROM calls the timer the "counter"
[all...] |
| /src/sys/arch/arm/ixp12x0/ |
| ixp12x0_clk.c | 275 int counter; local in function:gettick
279 counter = GET_TIMER_VALUE(ixpclk_sc);
281 return counter;
287 u_int savedints, base, counter; local in function:ixpclk_get_timecount
292 counter = GET_TIMER_VALUE(ixpclk_sc);
296 return base - counter;
|
| /src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/tests/ |
| sanitizer_stoptheworld_test.cc | 31 volatile int counter; member in struct:__sanitizer::CallbackArgument
35 : counter(0),
43 __sync_fetch_and_add(&callback_argument->counter, 1);
59 int counter_at_init = __sync_fetch_and_add(&callback_argument->counter, 0);
62 if (__sync_fetch_and_add(&callback_argument->counter, 0) !=
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| amdgpu_dc_hw_sequencer.c | 280 int counter; local in function:hwss_wait_for_blank_complete
285 for (counter = 0; counter < 100; counter++) {
292 if (counter == 100) {
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| amdgpu_dce_i2c_sw.c | 381 uint32_t counter = 0; local in function:dce_i2c_engine_acquire_sw
396 ++counter;
397 } while (counter < 2);
|
| amdgpu_dce_i2c_hw.c | 377 uint32_t counter = 0; local in function:acquire_i2c_hw_engine
408 ++counter;
409 } while (counter < 2);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_compressor.c | 91 /* Only if CRTC is enabled and counter is moving we wait for one frame. */
122 uint32_t counter = 0; local in function:wait_for_fbc_state_changed
126 while (counter < 1000) {
134 counter++;
137 if (counter == 1000) {
138 DC_LOG_WARNING("%s: wait counter exceeded, changes to HW not applied",
|
| /src/usr.bin/tftp/ |
| tftpsubs.c | 64 int counter; /* size of data in buffer, or flag */ member in struct:bf
68 /* Values for bf.counter */
100 bfs[0].counter = BF_ALLOC; /* pass out the first buffer */
102 bfs[1].counter = BF_FREE;
119 bfs[current].counter = BF_FREE; /* free old one */
123 if (b->counter == BF_FREE) /* if it's empty */
125 /* assert(b->counter != BF_FREE);*//* check */
127 return b->counter;
147 if (b->counter != BF_FREE) /* nop if not free */
154 b->counter = read(fileno(file), dp->th_data, amt)
[all...] |
| /src/sys/dev/ppbus/ |
| ppbus_base.c | 364 unsigned int counter = timeout; local in function:ppbus_request_bus
375 counter -= (hz/2);
380 if(counter == 0) {
413 unsigned int counter = timeout; local in function:ppbus_release_bus
424 counter -= (hz/2);
429 if(counter == 0) {
|
| /src/sys/arch/evbarm/iq80310/ |
| iq80310_timer.c | 69 * Some IQ80310-based designs have fewer bits in the timer counter.
255 u_int oldirqstate, base, counter; local in function:iq80310_get_timecount
259 counter = timer_read();
262 return base + counter;
|
| /src/sys/arch/vax/vax/ |
| clock.c | 66 u_int counter; local in function:vax_diag_get_counter
70 counter = *(volatile u_int *)&ka46_cpu->vc_diagtimu;
73 counter = (counter & 0x3ff) + (counter >> 16) * 1024;
75 return counter + getticks() * tick;
83 u_int counter; local in function:vax_mfpr_get_counter
88 counter = mfpr(PR_ICR) + tick;
92 * Handle interval counter wrapping with interrupts blocked.
95 * If the interval counter is smaller, assume it has wrapped
[all...] |
| /src/sys/arch/arm/sa11x0/ |
| sa11x0_ost.c | 262 /* Zero the counter value */
297 uint32_t counter; local in function:gettick
301 counter = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
304 return counter;
345 uint32_t counter; local in function:saost_reset
350 counter = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
351 counter += TIMER_FREQUENCY;
352 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR3, counter);
|
| /src/sys/arch/evbarm/ifpga/ |
| ifpga_clock.c | 322 u_int base, counter; local in function:ifpga_get_timecount
326 counter = getclock();
329 return base - counter;
|
| /src/sys/dev/i2c/ |
| nxt2k.c | 180 int counter; local in function:nxt2k_mc_stop
189 for(counter = 0; counter < 20; counter++) {
217 int counter; local in function:nxt2k4_mc_init
231 for(counter = 0; counter < 20; counter++) {
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/ |
| amdgpu_dce112_compressor.c | 302 uint8_t counter = 0; local in function:wait_for_fbc_state_changed
306 while (counter < 10) {
314 counter++;
317 if (counter == 10) {
319 "%s: wait counter exceeded, changes to HW not applied",
|
