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  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/renesas/
r9a07g044.dtsi 9 #include <dt-bindings/clock/r9a07g044-cpg.h>
92 clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>;
94 power-domains = <&cpg>;
95 resets = <&cpg R9A07G044_SCIF0_RST_SYSTEM_N>;
113 clocks = <&cpg CPG_MOD R9A07G044_CANFD_PCLK>,
114 <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>,
117 assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>;
119 resets = <&cpg R9A07G044_CANFD_RSTP_N>,
120 <&cpg R9A07G044_CANFD_RSTC_N>;
122 power-domains = <&cpg>;
263 cpg: clock-controller@11010000 { label
    [all...]
r9a07g043.dtsi 8 #include <dt-bindings/clock/r9a07g043-cpg.h>
140 clocks = <&cpg CPG_MOD R9A07G043_MTU_X_MCK_MTU3>;
141 power-domains = <&cpg>;
142 resets = <&cpg R9A07G043_MTU_X_PRESET_MTU3>;
155 clocks = <&cpg CPG_MOD R9A07G043_SSI0_PCLK2>,
156 <&cpg CPG_MOD R9A07G043_SSI0_PCLK_SFR>,
159 resets = <&cpg R9A07G043_SSI0_RST_M2_REG>;
162 power-domains = <&cpg>;
175 clocks = <&cpg CPG_MOD R9A07G043_SSI1_PCLK2>,
176 <&cpg CPG_MOD R9A07G043_SSI1_PCLK_SFR>
577 cpg: clock-controller@11010000 { label
    [all...]
r8a779a0.dtsi 8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
84 clocks = <&cpg CPG_MOD 907>;
86 resets = <&cpg 907>;
103 clocks = <&cpg CPG_MOD 916>;
105 resets = <&cpg 916>;
117 clocks = <&cpg CPG_MOD 915>;
119 resets = <&cpg 915>;
131 clocks = <&cpg CPG_MOD 915>;
133 resets = <&cpg 915>;
145 clocks = <&cpg CPG_MOD 916>
309 cpg: clock-controller@e6150000 { label in label:soc
    [all...]
r8a77970.dtsi 9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
42 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
52 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
111 clocks = <&cpg CPG_MOD 402>;
113 resets = <&cpg 402>;
127 clocks = <&cpg CPG_MOD 912>;
129 resets = <&cpg 912>;
142 clocks = <&cpg CPG_MOD 911>;
144 resets = <&cpg 911>;
157 clocks = <&cpg CPG_MOD 910>
282 cpg: clock-controller@e6150000 { label
    [all...]
r8a774c0.dtsi 8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
81 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
92 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
148 clocks = <&cpg CPG_MOD 402>;
150 resets = <&cpg 402>;
164 clocks = <&cpg CPG_MOD 912>;
166 resets = <&cpg 912>;
179 clocks = <&cpg CPG_MOD 911>;
181 resets = <&cpg 911>;
194 clocks = <&cpg CPG_MOD 910>
334 cpg: clock-controller@e6150000 { label in label:soc
    [all...]
r8a77980.dtsi 9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
43 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
53 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
63 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
73 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
141 clocks = <&cpg CPG_MOD 402>;
143 resets = <&cpg 402>;
157 clocks = <&cpg CPG_MOD 912>;
159 resets = <&cpg 912>;
172 clocks = <&cpg CPG_MOD 911>
312 cpg: clock-controller@e6150000 { label
    [all...]
r8a77995.dtsi 9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
97 clocks = <&cpg CPG_MOD 402>;
99 resets = <&cpg 402>;
113 clocks = <&cpg CPG_MOD 912>;
115 resets = <&cpg 912>;
128 clocks = <&cpg CPG_MOD 911>;
130 resets = <&cpg 911>;
143 clocks = <&cpg CPG_MOD 910>;
145 resets = <&cpg 910>;
158 clocks = <&cpg CPG_MOD 909>
283 cpg: clock-controller@e6150000 { label
    [all...]
  /src/usr.sbin/makefs/
ffs.h 48 int cpg; /* cylinders per group */ member in struct:__anon6ccfc86b0108
49 int cpgflg; /* cpg was specified by user */
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
r7s9210.dtsi 10 #include <dt-bindings/clock/r7s9210-cpg-mssr.h>
82 clocks = <&cpg CPG_MOD 47>;
84 power-domains = <&cpg>;
99 clocks = <&cpg CPG_MOD 46>;
101 power-domains = <&cpg>;
116 clocks = <&cpg CPG_MOD 45>;
118 power-domains = <&cpg>;
133 clocks = <&cpg CPG_MOD 44>;
135 power-domains = <&cpg>;
150 clocks = <&cpg CPG_MOD 43>
460 cpg: clock-controller@fcfe0010 { label
    [all...]
r8a7792.dtsi 8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
54 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
65 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
114 clocks = <&cpg CPG_MOD 402>;
116 resets = <&cpg 402>;
130 clocks = <&cpg CPG_MOD 912>;
132 resets = <&cpg 912>;
145 clocks = <&cpg CPG_MOD 911>;
147 resets = <&cpg 911>;
160 clocks = <&cpg CPG_MOD 910>
305 cpg: clock-controller@e6150000 { label
    [all...]
r8a77470.dtsi 10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
34 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
94 clocks = <&cpg CPG_MOD 402>;
96 resets = <&cpg 402>;
110 clocks = <&cpg CPG_MOD 912>;
112 resets = <&cpg 912>;
125 clocks = <&cpg CPG_MOD 911>;
127 resets = <&cpg 911>;
140 clocks = <&cpg CPG_MOD 910>
196 cpg: clock-controller@e6150000 { label
    [all...]
r8a7793.dtsi 8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
69 clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
90 clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
149 clocks = <&cpg CPG_MOD 402>;
151 resets = <&cpg 402>;
165 clocks = <&cpg CPG_MOD 912>;
167 resets = <&cpg 912>;
180 clocks = <&cpg CPG_MOD 911>;
182 resets = <&cpg 911>;
195 clocks = <&cpg CPG_MOD 910>
281 cpg: clock-controller@e6150000 { label
    [all...]
r8a7794.dtsi 9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
71 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
82 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
131 clocks = <&cpg CPG_MOD 402>;
133 resets = <&cpg 402>;
147 clocks = <&cpg CPG_MOD 912>;
149 resets = <&cpg 912>;
162 clocks = <&cpg CPG_MOD 911>;
164 resets = <&cpg 911>;
177 clocks = <&cpg CPG_MOD 910>
247 cpg: clock-controller@e6150000 { label
    [all...]
r8a7742.dtsi 8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
56 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
78 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
100 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
122 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
144 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
154 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
164 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
174 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
248 clocks = <&cpg CPG_MOD 402>
360 cpg: clock-controller@e6150000 { label
    [all...]
r8a7743.dtsi 10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
58 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
78 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
143 clocks = <&cpg CPG_MOD 402>;
145 resets = <&cpg 402>;
159 clocks = <&cpg CPG_MOD 912>;
161 resets = <&cpg 912>;
174 clocks = <&cpg CPG_MOD 911>;
176 resets = <&cpg 911>;
189 clocks = <&cpg CPG_MOD 910>
284 cpg: clock-controller@e6150000 { label
    [all...]
r8a7744.dtsi 10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h>
58 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
78 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
143 clocks = <&cpg CPG_MOD 402>;
145 resets = <&cpg 402>;
159 clocks = <&cpg CPG_MOD 912>;
161 resets = <&cpg 912>;
174 clocks = <&cpg CPG_MOD 911>;
176 resets = <&cpg 911>;
189 clocks = <&cpg CPG_MOD 910>
284 cpg: clock-controller@e6150000 { label
    [all...]
r8a7745.dtsi 10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
73 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
84 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
139 clocks = <&cpg CPG_MOD 912>;
141 resets = <&cpg 912>;
154 clocks = <&cpg CPG_MOD 911>;
156 resets = <&cpg 911>;
169 clocks = <&cpg CPG_MOD 910>;
171 resets = <&cpg 910>;
184 clocks = <&cpg CPG_MOD 909>
249 cpg: clock-controller@e6150000 { label
    [all...]
r8a7790.dtsi 10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
78 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
166 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
178 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
190 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
202 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
277 clocks = <&cpg CPG_MOD 402>
378 cpg: clock-controller@e6150000 { label
    [all...]
r8a7791.dtsi 10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
77 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
98 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
164 clocks = <&cpg CPG_MOD 402>;
166 resets = <&cpg 402>;
180 clocks = <&cpg CPG_MOD 912>;
182 resets = <&cpg 912>;
195 clocks = <&cpg CPG_MOD 911>;
197 resets = <&cpg 911>;
210 clocks = <&cpg CPG_MOD 910>
306 cpg: clock-controller@e6150000 { label
    [all...]
  /src/lib/libukfs/
ukfs_int_disklabel.h 146 uint16_t cpg; /* UFS: FS cylinders per group */ member in union:ukfs__disklabel::ukfs__partition::__anone7ac4155040a
149 #define p_cpg __partition_u1.cpg
  /src/sys/arch/atari/stand/tostools/aptck/
disklbl.h 128 u_int16_t cpg; /* UFS: FS cylinders per group */ member in union:disklabel::partition::__anonb2fa26a4030a
131 #define p_cpg __partition_u1.cpg
  /src/sys/arch/atari/stand/tostools/libtos/
disklbl.h 128 u_int16_t cpg; /* UFS: FS cylinders per group */ member in union:disklabel::partition::__anon7bc9703e030a
131 #define p_cpg __partition_u1.cpg
  /src/sys/sys/
disklabel_rdb.h 121 uint32_t cpg; /* 22: cylinders per group */ member in struct:ados_environ
disklabel.h 113 uint16_t cpg; /* UFS: FS cylinders per group */ member in union:partition::__anond9b3f2ea020a
116 #define p_cpg __partition_u1.cpg
290 uint16_t cpg; member in union:olddisklabel::opartition::__anond9b3f2ea080a
  /src/usr.bin/rump_allserver/
rump_allserver.c 614 uint16_t cpg; /* UFS: FS cylinders per group */ member in union:rumpserver_disklabel::rumpserver_partition::__anon80e292a3040a
617 #define p_cpg __partition_u1.cpg

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