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    Searched defs:mux (Results 1 - 25 of 44) sorted by relevancy

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  /src/sys/arch/arm/amlogic/
meson_clk_mux.c 42 struct meson_clk_mux *mux = &clk->u.mux; local in function:meson_clk_mux_get_parent
49 val = CLK_READ(sc, mux->reg);
52 sel = __SHIFTOUT(val, mux->sel);
53 if (sel >= mux->nparents)
56 return mux->parents[sel];
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
at91-natte.dtsi 11 mux: mux-controller { label
12 compatible = "gpio-mux";
13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
20 batntc-mux {
21 compatible = "io-channel-mux";
24 mux-controls = <&mux>;
31 batv-mux {
    [all...]
at91-tse850-3.dts 80 mux: mux-controller { label
81 compatible = "gpio-mux";
82 #mux-control-cells = <0>;
84 mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
90 envelope-detector-mux {
91 compatible = "io-channel-mux";
95 mux-controls = <&mux>;
  /src/sys/arch/arm/nxp/
imx_ccm_mux.c 45 struct imx_ccm_mux *mux = &clk->u.mux; local in function:imx_ccm_mux_get_parent
49 const uint32_t val = CCM_READ(sc, clk->regidx, mux->reg);
50 const u_int sel = __SHIFTOUT(val, mux->sel);
52 if (sel >= mux->nparents)
55 return mux->parents[sel];
62 struct imx_ccm_mux *mux = &clk->u.mux; local in function:imx_ccm_mux_set_parent
67 for (u_int sel = 0; sel < mux->nparents; sel++) {
68 if (strcmp(mux->parents[sel], parent) == 0)
    [all...]
imx_ccm_composite.c 115 const u_int mux = __SHIFTOUT(val, TARGET_ROOT_MUX); local in function:imx_ccm_composite_set_rate
117 if (mux >= composite->nparents)
120 rclk_parent = imx_ccm_clock_find(sc, composite->parents[mux]);
124 clk_parent = fdtbus_clock_byname(composite->parents[mux]);
173 const u_int mux = __SHIFTOUT(val, TARGET_ROOT_MUX); local in function:imx_ccm_composite_get_parent
175 if (mux >= composite->nparents)
178 return composite->parents[mux];
190 for (u_int mux = 0; mux < composite->nparents; mux++) local in function:imx_ccm_composite_set_parent
    [all...]
imx6var.h 55 uint32_t mux; member in struct:iomux_conf
  /src/sys/arch/arm/sunxi/
sunxi_ccu_mux.c 43 struct sunxi_ccu_mux *mux = &clk->u.mux; local in function:sunxi_ccu_mux_set_parent
49 if (mux->sel == 0)
52 for (index = 0; index < mux->nparents; index++) {
53 if (mux->parents[index] != NULL &&
54 strcmp(mux->parents[index], name) == 0)
57 if (index == mux->nparents)
60 val = CCU_READ(sc, mux->reg);
61 val &= ~mux->sel;
62 val |= __SHIFTIN(index, mux->sel)
72 struct sunxi_ccu_mux *mux = &clk->u.mux; local in function:sunxi_ccu_mux_get_parent
    [all...]
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/
fsl-ls1028a-qds.dts 92 mdio-mux {
93 compatible = "mdio-mux-multiplexer";
94 mux-controls = <&mux 0>;
240 i2c-mux@77 {
312 mux: mux-controller { label
313 compatible = "reg-mux";
314 #mux-control-cells = <1>;
315 mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 *
    [all...]
fsl-lx2162a-qds.dts 33 mdio-mux-1 {
34 compatible = "mdio-mux-multiplexer";
35 mux-controls = <&mux 0>;
113 mdio-mux-2 {
114 compatible = "mdio-mux-multiplexer";
115 mux-controls = <&mux 1>;
259 mux: mux-controller label
    [all...]
  /src/sys/arch/arm/rockchip/
rk_cru_mux.c 43 struct rk_cru_mux *mux = &clk->u.mux; local in function:rk_cru_mux_get_parent
44 const bool mux_grf = (mux->flags & RK_MUX_GRF) != 0;
53 val = syscon_read_4(sc->sc_grf, mux->reg);
56 val = CRU_READ(sc, mux->reg);
58 const u_int index = __SHIFTOUT(val, mux->mask);
60 return mux->parents[index];
67 struct rk_cru_mux *mux = &clk->u.mux; local in function:rk_cru_mux_set_parent
68 const bool mux_grf = (mux->flags & RK_MUX_GRF) != 0
    [all...]
rk_cru_arm.c 207 const u_int mux = __SHIFTOUT(val, arm->mux_mask); local in function:rk_cru_arm_get_parent
209 return arm->parents[mux];
220 for (u_int mux = 0; mux < arm->nparents; mux++) local in function:rk_cru_arm_set_parent
221 if (strcmp(arm->parents[mux], parent) == 0) {
223 const uint32_t write_val = __SHIFTIN(mux, arm->mux_mask);
rk_cru_composite.c 170 for (u_int mux = 0; mux < composite->nparents; mux++) { local in function:rk_cru_composite_set_rate
171 rclk_parent = rk_cru_clock_find(sc, composite->parents[mux]);
175 clk_parent = fdtbus_clock_byname(composite->parents[mux]);
189 best_mux = mux;
195 best_mux = mux;
222 u_int mux; local in function:rk_cru_composite_get_parent
228 mux = __SHIFTOUT(val, composite->mux_mask);
230 mux = 0
247 for (u_int mux = 0; mux < composite->nparents; mux++) { local in function:rk_cru_composite_set_parent
    [all...]
rk3288_iomux.c 229 struct rk3288_iomux_reg *reg, u_int mux)
242 val |= mux << reg->mux_bit;
248 u_int mux, const int phandle)
256 printf(" -> %s mux %#x/%d, pull %#x/%d, drv %#x/%d, flags %#x\n",
262 printf(" bias %d drv %d mux %u\n", bias, drv, mux);
274 rk3288_iomux_set_mux(sc, reg, mux);
296 const u_int mux = be32toh(pins[2]); local in function:rk3288_iomux_pinctrl_set_config
304 rk3288_iomux_config(sc, &regdef, mux, cfg);
307 bank, mux);
    [all...]
rk3328_iomux.c 180 rk3328_iomux_set_mux(struct rk3328_iomux_softc *sc, u_int bank, u_int idx, u_int mux)
187 WR4(sc, reg, (mask << 16) | __SHIFTIN(mux, mask));
191 rk3328_iomux_config(struct rk3328_iomux_softc *sc, const int phandle, u_int bank, u_int idx, u_int mux)
238 rk3328_iomux_set_mux(sc, bank, idx, mux);
258 const u_int mux = be32toh(pins[2]); local in function:rk3328_iomux_pinctrl_set_config
262 rk3328_iomux_config(sc, cfg, bank, idx, mux);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/
generic_regs.h 48 .mux = REG(DC_GENERIC ## id),\
56 uint32_t mux; member in struct:generic_registers
hw_gpio.h 80 * Some GPIOs have HW mux which allows to choose
103 uint32_t mux; member in struct:hw_gpio::__anona7ac9e0b0108
106 /* GPIO MUX support */
  /src/usr.sbin/wsconscfg/
wsconscfg.c 63 int c, delete, kbd, idx, wsfd, swtch, get, mux; local in function:main
72 mux = 0;
101 mux++;
138 wmd.type = mux ? WSMUX_MUX : WSMUX_KBD;
  /src/sys/arch/arm/imx/
imx51var.h 66 u_short mux; member in struct:iomux_conf
  /src/sys/dev/i2c/
i2cmuxvar.h 51 struct iicmux_softc *mux; member in struct:iicmux_bus
  /src/sys/arch/arm/samsung/
exynos_clock.h 77 struct exynos_mux_clk mux; member in union:exynos_clk::__anoncaafd60b010a
  /src/sys/dev/fdt/
pinctrl_single.c 125 const int mux = len == 4 ? 0 : be32toh(pins[2]); local in function:pinctrl_single_pins_set_config
127 pinctrl_single_pins_write(sc, off, val | mux);
  /src/sys/dev/wscons/
wsbell.c 215 int mux, error; local in function:wsbell_attach
226 mux = device_cfdata(self)->wsbelldevcf_mux;
227 if (mux >= 0) {
228 error = wsmux_attach_sc(wsmux_getmux(mux), &sc->sc_base);
232 aprint_normal(" mux %d", mux);
236 aprint_normal(" (mux ignored)");
271 /* Tell parent mux we're leaving. */
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/pm/
priv.h 35 const struct nvkm_specmux *mux; member in struct:nvkm_specsrc
  /src/sys/arch/arm/nvidia/
tegra_clock.h 83 struct tegra_mux_clk mux; member in union:tegra_clk::__anon56bd0515010a
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/microchip/
sparx5.dtsi 126 mux: mux-controller { label in label:axi.cpu_ctrl
127 compatible = "mmio-mux";
128 #mux-control-cells = <0>;
134 mux-reg-masks = <0x88 0xf0>;

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