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      1 /*	$NetBSD: octeon_pci.c,v 1.5 2020/06/22 02:26:20 simonb Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2007, 2008 Internet Initiative Japan, Inc.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: octeon_pci.c,v 1.5 2020/06/22 02:26:20 simonb Exp $");
     31 
     32 #include "opt_octeon.h"
     33 
     34 #include <sys/param.h>
     35 #include <sys/systm.h>
     36 #include <sys/types.h>
     37 #include <sys/device.h>
     38 
     39 #include <sys/bus.h>
     40 
     41 #include <mips/cavium/octeonvar.h>
     42 #include <mips/cavium/dev/octeon_ciureg.h>
     43 #include <mips/cavium/dev/octeon_npireg.h>
     44 
     45 /*
     46  * In OCTEON, some infrequent, error interrupts (RML) are handled with PCI
     47  * interrupt.  Hence, here.
     48  */
     49 
     50 void			octpci_bootstrap(struct octeon_config *);
     51 static void		octpci_init(void);
     52 
     53 void
     54 octpci_bootstrap(struct octeon_config *mcp)
     55 {
     56 	octpci_init();
     57 }
     58 
     59 static void
     60 octpci_init(void)
     61 {
     62 
     63 	/* XXX remove this? */
     64 }
     65