| /src/sys/external/isc/atheros_hal/dist/ar5210/ |
| ar5210_xmit.c | 72 HAL_TX_QUEUE_INFO *qi; local in function:ar5210SetupTxQueue
93 qi = &ahp->ah_txq[q];
94 if (qi->tqi_type != HAL_TX_QUEUE_INACTIVE) {
99 OS_MEMZERO(qi, sizeof(HAL_TX_QUEUE_INFO));
100 qi->tqi_type = type;
103 qi->tqi_qflags =
109 qi->tqi_aifs = INIT_AIFS;
110 qi->tqi_cwmin = HAL_TXQ_USEDEFAULT; /* NB: do at reset */
111 qi->tqi_shretry = INIT_SH_RETRY;
112 qi->tqi_lgretry = INIT_LG_RETRY
126 HAL_TX_QUEUE_INFO *qi; local in function:ar5210ReleaseTxQueue
158 HAL_TX_QUEUE_INFO *qi; local in function:ar5210ResetTxQueue
260 HAL_TX_QUEUE_INFO *qi; local in function:ar5210GetTxDP
285 HAL_TX_QUEUE_INFO *qi; local in function:ar5210SetTxDP
370 HAL_TX_QUEUE_INFO *qi; local in function:ar5210StartTxDma
403 HAL_TX_QUEUE_INFO *qi; local in function:ar5210NumTxPending
431 HAL_TX_QUEUE_INFO *qi; local in function:ar5210StopTxDma
[all...] |
| /src/sys/external/isc/atheros_hal/dist/ar5211/ |
| ar5211_xmit.c | 116 HAL_TX_QUEUE_INFO *qi; local in function:ar5211SetupTxQueue
139 qi = &ahp->ah_txq[q];
140 if (qi->tqi_type != HAL_TX_QUEUE_INACTIVE) {
145 OS_MEMZERO(qi, sizeof(HAL_TX_QUEUE_INFO));
146 qi->tqi_type = type;
149 qi->tqi_qflags =
155 qi->tqi_aifs = INIT_AIFS;
156 qi->tqi_cwmin = HAL_TXQ_USEDEFAULT; /* NB: do at reset */
157 qi->tqi_cwmax = INIT_CWMAX;
158 qi->tqi_shretry = INIT_SH_RETRY
202 HAL_TX_QUEUE_INFO *qi; local in function:ar5211ReleaseTxQueue
237 HAL_TX_QUEUE_INFO *qi; local in function:ar5211ResetTxQueue
[all...] |
| /src/sys/external/isc/atheros_hal/dist/ar5212/ |
| ar5212_xmit.c | 124 HAL_TX_QUEUE_INFO *qi; local in function:ar5212SetupTxQueue
176 qi = &ahp->ah_txq[q];
177 if (qi->tqi_type != HAL_TX_QUEUE_INACTIVE) {
182 OS_MEMZERO(qi, sizeof(HAL_TX_QUEUE_INFO));
183 qi->tqi_type = type;
185 qi->tqi_qflags = defqflags;
186 qi->tqi_aifs = INIT_AIFS;
187 qi->tqi_cwmin = HAL_TXQ_USEDEFAULT; /* NB: do at reset */
188 qi->tqi_cwmax = INIT_CWMAX;
189 qi->tqi_shretry = INIT_SH_RETRY
234 HAL_TX_QUEUE_INFO *qi; local in function:ar5212ReleaseTxQueue
272 HAL_TX_QUEUE_INFO *qi; local in function:ar5212ResetTxQueue
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_bw.c | 31 struct intel_qgv_info *qi)
46 qi->dram_type = INTEL_DRAM_DDR4;
49 qi->dram_type = INTEL_DRAM_LPDDR4;
52 qi->dram_type = INTEL_DRAM_DDR3;
55 qi->dram_type = INTEL_DRAM_LPDDR3;
64 qi->dram_type = INTEL_DRAM_DDR4;
67 qi->dram_type = INTEL_DRAM_DDR3;
70 qi->dram_type = INTEL_DRAM_LPDDR3;
73 qi->dram_type = INTEL_DRAM_LPDDR4;
81 qi->dram_type = INTEL_DRAM_LPDDR3; /* Conservative default *
184 struct intel_qgv_info qi = {}; local in function:icl_get_bw_info
[all...] |
| /src/sys/dev/qbus/ |
| if_qt.c | 208 struct qt_init *qi; local in function:qtmatch
220 qi = (struct qt_init *)ui.ui_vaddr;
221 memset(qi, 0, sizeof(struct qt_init));
222 qi->vector = uh->uh_lastiv - 4;
223 qi->options = INIT_OPTIONS_INT;
|
| /src/sys/arch/arm/xscale/ |
| ixp425_qmgr.c | 270 struct qmgrInfo *qi = &sc->qinfo[i]; local in function:ixpqmgr_attach
272 qi->cb = dummyCallback;
273 qi->priority = IX_QMGR_Q_PRIORITY_0; /* default priority */
280 qi->intRegCheckMask = (1<<(i%(IX_QMGR_MIN_QUEUPP_QID)));
289 qi->qAccRegAddr = IX_QMGR_Q_ACCESS_ADDR_GET(i);
290 qi->qAccRegAddr = IX_QMGR_Q_ACCESS_ADDR_GET(i);
291 qi->qConfigRegAddr = IX_QMGR_Q_CONFIG_ADDR_GET(i);
296 qi->qUOStatRegAddr = IX_QMGR_QUEUOSTAT0_OFFSET +
301 qi->qUflowStatBitMask =
307 qi->qOflowStatBitMask =
358 struct qmgrInfo *qi = &sc->qinfo[qId]; local in function:ixpqmgr_qconfig
402 struct qmgrInfo *qi = &sc->qinfo[qId]; local in function:ixpqmgr_qwrite
471 struct qmgrInfo *qi = &sc->qinfo[qId]; local in function:ixpqmgr_qread
500 struct qmgrInfo *qi = &sc->qinfo[qId]; local in function:ixpqmgr_qreadm
541 const struct qmgrInfo *qi = &sc->qinfo[qId]; local in function:ixpqmgr_getqstatus
673 struct qmgrInfo *qi; local in function:ixpqmgr_rebuild
754 struct qmgrInfo *qi; local in function:ixpqmgr_intr
980 const struct qmgrInfo *qi = &sc->qinfo[qId]; local in function:aqm_qcfg
[all...] |
| /src/sys/dev/ |
| sequencer.c | 551 sequencer_pcqitem_t qi; local in function:seq_softintr
558 qi.qi_ptr = pcq_get(sc->pcq);
559 if (qi.qi_ptr == NULL) {
563 KASSERT((qi.qi_msg[3] & 0x80) != 0);
564 unit = qi.qi_msg[3] & ~0x80;
565 status = MIDI_GET_STATUS(qi.qi_msg[0]);
566 chan = MIDI_GET_CHAN(qi.qi_msg[0]);
570 .key=qi.qi_msg[1], .velocity=qi.qi_msg[2]);
574 .key=qi.qi_msg[1], .velocity=qi.qi_msg[2])
1420 sequencer_pcqitem_t qi; local in function:midiseq_in
[all...] |
| /src/sbin/sysctl/ |
| sysctl.c | 1759 u_quad_t qi, qo; local in function:write_number
1773 qi = strtouq(value, &t, 0);
1774 if (qi == UQUAD_MAX && errno == ERANGE) {
1785 ii = (u_int)qi;
1786 io = (u_int)(qi >> 32);
1797 bi = (bool)qi;
1806 i = &qi;
1807 si = sizeof(qi);
1830 display_number(node, gsname, &qi, sizeof(qi), DISPLAY_NEW)
[all...] |
| /src/sys/dev/ic/ |
| ath.c | 2102 HAL_TXQ_INFO qi; local in function:ath_beaconq_setup
2104 memset(&qi, 0, sizeof(qi));
2105 qi.tqi_aifs = HAL_TXQ_USEDEFAULT;
2106 qi.tqi_cwmin = HAL_TXQ_USEDEFAULT;
2107 qi.tqi_cwmax = HAL_TXQ_USEDEFAULT;
2109 qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
2110 return ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_BEACON, &qi);
2122 HAL_TXQ_INFO qi; local in function:ath_beaconq_config
2124 ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi);
3338 HAL_TXQ_INFO qi; local in function:ath_txq_setup
3430 HAL_TXQ_INFO qi; local in function:ath_txq_update
[all...] |
