/src/sys/arch/vax/include/ |
reg.h | 42 int r8; member in struct:reg
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/src/sys/arch/hpc/stand/hpcboot/sh3/dev/ |
sh3_dev.cpp | 232 uint8_t r8; local in function:SH3dev::tmu_dump 237 r8 = _reg_read_1(SH3_TOCR); 239 r8 & SH3_TOCR_TCOE ? "RTC output" : "input")); 241 r8 = _reg_read_1(SH3_TSTR); 243 r8 & SH3_TSTR_STR0 ? 'x' : '_', 244 r8 & SH3_TSTR_STR1 ? 'x' : '_', 245 r8 & SH3_TSTR_STR2 ? 'x' : '_')); 300 uint8_t r8; local in function:SH3dev::hd64461_dump 417 r8 = _reg_read_1(HD64461_PCC0ISR_REG8); 418 bitdisp(r8); [all...] |
/src/sys/compat/linux/arch/amd64/ |
linux_machdep.h | 62 u_int64_t r8; member in struct:linux_sigcontext
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_stream/salsa20/xmm6int/ |
u4.h | 102 __m128i r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, variable in typeref:typename:__m128i 123 r8 = y8; 126 r8 = _mm_srli_epi32(r8, 23); 127 z8 = _mm_xor_si128(z8, r8); 315 r8 = y8; 318 r8 = _mm_srli_epi32(r8, 23); 319 z8 = _mm_xor_si128(z8, r8);
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u8.h | 102 __m256i r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, variable in typeref:typename:__m256i 123 r8 = y8; 126 r8 = _mm256_srli_epi32(r8, 23); 127 z8 = _mm256_xor_si256(z8, r8); 315 r8 = y8; 318 r8 = _mm256_srli_epi32(r8, 23); 319 z8 = _mm256_xor_si256(z8, r8);
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/src/sys/external/bsd/compiler_rt/dist/lib/tsan/rtl/ |
tsan_ppc_regs.h | 9 #define r8 8 macro
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/src/sys/external/bsd/gnu-efi/dist/inc/protocol/ia64/ |
eficontext.h | 78 UINT64 r8;
member in struct:__anon904514ee0108
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/src/sys/external/mit/xen-include-public/dist/xen/include/public/ |
vm_event.h | 95 * At the moment x86-only, applies to EAX-EDX, ESP, EBP, ESI, EDI, R8-R15, 173 uint64_t r8; member in struct:vm_event_regs_x86
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/src/sys/dev/ic/ |
nvme.c | 186 uint64_t r8; local in function:nvme_dumpregs 190 r8 = nvme_read8(sc, NVME_CAP); 193 (u_int)NVME_CAP_MPSMAX(r8), (1 << NVME_CAP_MPSMAX(r8))); 195 (u_int)NVME_CAP_MPSMIN(r8), (1 << NVME_CAP_MPSMIN(r8))); 196 printf("%s: css %"PRIu64"\n", DEVNAME(sc), NVME_CAP_CSS(r8)); 197 printf("%s: nssrs %"PRIu64"\n", DEVNAME(sc), NVME_CAP_NSSRS(r8)); 198 printf("%s: dstrd %"PRIu64"\n", DEVNAME(sc), NVME_CAP_DSTRD(r8)); 199 printf("%s: to %"PRIu64" msec\n", DEVNAME(sc), NVME_CAP_TO(r8)); [all...] |
/src/sys/arch/powerpc/include/ |
asm.h | 272 # define r8 8 macro
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/src/lib/libm/ld128/ |
e_lgammal_r.c | 154 r8 = 1.52881761239180800640068128681725702e-04L, variable in typeref:typename:const long double 302 q = one+y*(r1+y*(r2+y*(r3+y*(r4+y*(r5+y*(r6+y*(r7+y*(r8+
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/src/sys/arch/hpcsh/dev/hd64461/ |
hd64461pcmcia.c | 1124 uint8_t r8; local in function:hd64461pcmcia_info 1132 r8 = hd64461_reg_read_1(HD64461_PCC0ISR_REG8); 1134 #define _(m) dbg_bitmask_print(r8, HD64461_PCC0ISR_##m, #m) 1141 r8 = hd64461_reg_read_1(HD64461_PCC0GCR_REG8); 1142 #define _(m) dbg_bitmask_print(r8, HD64461_PCC0GCR_##m, #m) 1149 r8 = hd64461_reg_read_1(HD64461_PCC0CSCR_REG8); 1150 #define _(m) dbg_bitmask_print(r8, HD64461_PCC0CSCR_##m, #m) 1156 r8 = hd64461_reg_read_1(HD64461_PCC0CSCIER_REG8); 1157 #define _(m) dbg_bitmask_print(r8, HD64461_PCC0CSCIER_##m, #m) 1161 switch (r8 & HD64461_PCC0CSCIER_P0IREQE_MASK) [all...] |
/src/sys/external/bsd/compiler_rt/dist/lib/msan/ |
msan_interceptors.cc | 256 uptr r8; local in function:INTERCEPTOR 257 asm volatile("mov %0,x8" : "=r" (r8)); 258 sret = reinterpret_cast<__sanitizer_struct_mallinfo*>(r8);
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/src/sys/external/mit/xen-include-public/dist/xen/include/public/arch-x86/hvm/ |
save.h | 66 uint64_t r8; member in struct:hvm_hw_cpu 180 uint64_t r8; member in struct:hvm_hw_cpu_compat
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/src/sys/lib/libkern/arch/hppa/ |
milli.S | 40 r8: .equ 8 label
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