Home | History | Annotate | Download | only in include
History log of /src/sys/arch/powerpc/include/asm.h
RevisionDateAuthorComments
 1.56  06-Jan-2025  martin PR 58960: fix misunderstanding in semantic and provide both the original
id string as well as _NETBSD_REVISIONID.
Do not rely on string concatenation in the inline assembler, use .ascii
and .asciz for individual string parts instead.
 1.55  04-Jan-2025  martin PR 58960: powerpc/asm.h: Respect NETBSD_REVISIONID.
 1.54  10-Feb-2024  andvar branches: 1.54.2;
s/psuedo/pseudo/ in comments.
 1.53  07-Jan-2022  andvar s/udpate/update/
 1.52  06-Jul-2020  rin Consistently use _LP64 instead of __LP64__, although both are defined for
powerpc64.

No binary changes intended.
 1.51  18-Apr-2020  joerg It's __RCSID for an extra level of indirection on PPC
 1.50  17-Apr-2020  joerg Mark the .ident section as mergable string section to avoid redundant
entries.
 1.49  01-Mar-2020  rin branches: 1.49.4;
Implement workaround for IBM405 Errata 77 (aka CPU_210), where
interrupted stwcx. may errantly write data to memory:

https://elinux.org/images/1/1d/Ppc405gp-errata.pdf

This is because stwcx. is split into two pieces in the pipeline.

We need to
(1) insert dcbt before every stwcx. instruction, as well as
(2) insert sync before every rfi/rfci instruction.

It is unclear which processors are affected, but according to Linux,
all 405-based cores up until 405GPR and 405EP are affected:

https://github.com/torvalds/linux/blob/master/arch/powerpc/platforms/40x/Kconfig#L140

For kernel, this workaround can be restricted to affected processors.
However, for kernel modules and userland, we have to enable it for all
32bit powerpc archs in order to share common binaries as before.

Proposed on port-powerpc:

http://mail-index.netbsd.org/port-powerpc/2020/02/21/msg003583.html
 1.48  12-Jan-2015  dennis branches: 1.48.18; 1.48.22;
Name the offsets to the remaining fields in the ppc64
stack frame header. Add a stack frame alignment macro
to avoid hard-coding that.
 1.47  23-Aug-2014  matt branches: 1.47.2;
Fix cmpptr/cmpreq/etc to use right mnemonics
 1.46  06-Mar-2014  matt branches: 1.46.4;
Add _XENTRY which doesn't set the section to .text
 1.45  28-Feb-2014  matt Add cmp{ptr,long,reg}{,l}{,i}
 1.44  27-Feb-2014  matt Use ## for concatenation
 1.43  27-Feb-2014  matt Add P2SZREG to be usign with .p2align
 1.42  12-Sep-2013  joerg Pass PICFLAGS down to cc-as-as and use __PIC__ to decide if it is small
vs big PIC mode. Retire -DPIC and -DBIGPIC.
 1.41  29-Jan-2013  kiyohara branches: 1.41.2;
Support 16bits over stack size.
 1.40  25-Nov-2012  christos provide _ENTRY(x) because some code needs it.
 1.39  26-Oct-2011  christos branches: 1.39.2; 1.39.12;
- Indent ifdefs, comment endif and else cpp tags
- Add missing END macro for LP64
- Make whitespace consistent
 1.38  08-Jun-2011  matt In INIT_CPUINFO, make L_CPU to set the cpu_info (just to be safe).
 1.37  05-Jun-2011  matt Remove <machine/atomic.h>; use <sys/atomic.h> instead.
Add <powerpc/cpuset.h> (for mpc85xx pmap).
Add some initial MP code for mpc85xx
Rework ipi code to be common across all ppcs
Change PPC to keep curlwp in %r13 while in the kernel.
Move astpending from cpu_info to mdlwp
Improve cpu_need_resched to be more MP friendly.
 1.36  07-Feb-2011  matt branches: 1.36.2;
binutils is automagically doing securecrt so make sure plt calls are emitted
with the secureplt magic as well.
 1.35  23-Jan-2011  matt Some ports use %r0 as tmp2 to INIT_CPUINFO which has adverse effects so
never use tmp2 to hold an address.
 1.34  18-Jan-2011  matt branches: 1.34.2;
Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
 1.33  17-Jan-2011  matt Kill _NOREGNAMES. Everything should be using %rX now. If it doesn't it
soon will.
 1.32  16-Jan-2011  matt branches: 1.32.2;
Add PIC_GOTSETUP and PIC_TOCSETUP which replace the old methods to get the
GOT (via a bl) to the new REL16 based relocs. This is another step to
supporting secure plt.
 1.31  15-Jan-2011  matt Add END(sym)
Add __RCSID (to match cdefs.h)
 1.30  20-Dec-2010  joerg Consistently use .gnu.warning with .pushsectio and .popsection on all
architectures instead of obsolete STABS frames for linker warnings.
 1.29  09-Mar-2010  matt branches: 1.29.2;
Put ASM RCSIDs into .ident
 1.28  10-Dec-2009  rmind branches: 1.28.2;
Rename L_ADDR to L_PCB and amend some comments accordingly.
 1.27  26-Nov-2009  matt Kill proc0paddr. Use lwp0.l_addr instead.
 1.26  23-Feb-2008  matt branches: 1.26.4; 1.26.26;
Add clrr{ptr,long,reg}i, l{ptr,long,reg}arx, st{ptr,long,reg}cx macros
 1.25  17-Oct-2007  garbled branches: 1.25.12; 1.25.16;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
 1.24  17-May-2007  yamt branches: 1.24.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.

from doc/BRANCHES:

idle lwp, and some changes depending on it.

1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
 1.23  12-Jul-2006  ross branches: 1.23.10; 1.23.14; 1.23.16; 1.23.22;
wrap as(1)-only elements in #ifdef _LOCORE
 1.22  07-Jul-2006  ross Add stmd and lmd macros.
 1.21  06-Jul-2006  ross more refinements for ppc64 PIC/PLT/TOC issues
 1.20  01-Jul-2006  ross Add ppc64 ENTRY() macro that defines the descriptor and the dot symbol.
 1.19  20-Jan-2006  christos branches: 1.19.2; 1.19.6; 1.19.14;
Add a STRONG_ALIAS macro
 1.18  11-Dec-2005  christos branches: 1.18.2;
merge ktrace-lwp.
 1.17  23-Jan-2005  simonb branches: 1.17.8;
Use lis@h/ori@l instead of lis@ha/addi@l since we may use r0 and addi
is one of those funny instructions that treats r0 == 0 when used as the
first arg.

Fixes problems on ibm4xx. Ok'd by matt@.
 1.16  19-Jan-2005  matt Split the hw-dependent powermanglement into its own function and make
Idle call that. Add a ci_idlespin function pointer to cpu_info.
Update INIT_CPUINFO to initialize it to a naked 'blr' instruction.
In oea/cpu_subr.c, add cpu_idlespin and make ci_idlespin point to it.
 1.15  08-Aug-2003  matt branches: 1.15.8;
Nuke ci_spillstk/CI_SPILLSTK. No longer needed.
 1.14  02-Aug-2003  matt Nuke stmreg/ldmreg. PPC64 doesn't have a lmd/stmd so make sure lmw/stmw
don't invoke valid instructions on PPC64.
 1.13  31-Jul-2003  matt Define SZREG {4,8} appropriately. Add pseudo-instructions (via #define)
to load/store int, long, pointer, register, multiple registers. This is so
assembly files can be support IPL32 and LP64 PowerPC implementations.
 1.12  02-Feb-2003  matt branches: 1.12.2;
Perform a rototill of the powerpc code. Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure. Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make
ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK
to std.<platform>. Change faultbuf to a struct instead of an array.

On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.
 1.11  18-Jan-2003  matt Add a temporary bridge to use %foo regnames in kernel / standalone code.
 1.10  30-Jul-2002  matt Don't define register references if not KERNEL or STANDALONE.
 1.9  23-Jun-2002  thorpej Add ENTRY_NOPROFILE().
 1.8  13-Jun-2001  simonb branches: 1.8.2; 1.8.8; 1.8.16; 1.8.18;
Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.
 1.7  23-Jun-2000  kleink branches: 1.7.2;
Add a WEAK_ALIAS() macro.
 1.6  05-Mar-1999  tsubai branches: 1.6.8; 1.6.18;
First-cut of profiling support.
XXX userland only, for now.
 1.5  02-Dec-1998  thorpej Implement WARN_REFERENCES().
 1.4  24-Nov-1998  tsubai Add PIC definitions.
 1.3  16-Apr-1997  thorpej Update for Elf.
 1.2  30-Nov-1996  jtc PROF -> GPROF
 1.1  30-Sep-1996  ws PowerPC port
 1.6.18.1  25-Jul-2000  kleink Pull up rev. 1.7 (approved by thorpej):
For ELF, add a WEAK_ALIAS() macro.
 1.6.8.1  20-Nov-2000  bouyer Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
 1.7.2.1  21-Jun-2001  nathanw Catch up to -current.
 1.8.18.1  23-Jul-2004  tron Pull up revision 1.10 (requested by skrll in ticket #1725):
Don't define register references if not KERNEL or STANDALONE.
 1.8.16.2  31-Aug-2002  gehenna catch up with -current.
 1.8.16.1  16-Jul-2002  gehenna catch up with -current.
 1.8.8.2  01-Aug-2002  nathanw Catch up to -current.
 1.8.8.1  13-Jun-2001  nathanw file asm.h was added on branch nathanw_sa on 2002-08-01 02:43:02 +0000
 1.8.2.1  06-Sep-2002  jdolecek sync kqueue branch with HEAD
 1.12.2.4  24-Jan-2005  skrll Sync with HEAD.
 1.12.2.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.12.2.2  18-Sep-2004  skrll Sync with HEAD.
 1.12.2.1  03-Aug-2004  skrll Sync with HEAD
 1.15.8.1  29-Apr-2005  kent sync with -current
 1.17.8.4  27-Feb-2008  yamt sync with head.
 1.17.8.3  03-Sep-2007  yamt sync with head.
 1.17.8.2  30-Dec-2006  yamt sync with head.
 1.17.8.1  21-Jun-2006  yamt sync with head.
 1.18.2.1  01-Feb-2006  yamt sync with head.
 1.19.14.1  13-Jul-2006  gdamore Merge from HEAD.
 1.19.6.1  11-Aug-2006  yamt sync with head
 1.19.2.1  09-Sep-2006  rpaulo sync with head
 1.23.22.2  02-Aug-2007  macallan sync with HEAD
 1.23.22.1  22-May-2007  matt Update to HEAD.
 1.23.16.1  11-Jul-2007  mjf Sync with head.
 1.23.14.1  27-May-2007  ad Sync with head.
 1.23.10.1  03-Apr-2007  matt Adapt powerpc to yamt-idlelwp. Nuke cpu_setfunc.
Don't define _HAVE_BITENDIAN_BITOPS. Misc cleanups.
 1.24.10.2  23-Mar-2008  matt sync with HEAD
 1.24.10.1  06-Nov-2007  matt sync with HEAD
 1.25.16.1  03-Apr-2008  mjf Sync with HEAD.
 1.25.12.1  24-Mar-2008  keiichi sync with head.
 1.26.26.3  26-Jan-2011  matt Init CI_CURPCB too.
 1.26.26.2  11-Jan-2011  matt Add a END(y) for function sizes.
 1.26.26.1  07-Jan-2011  matt Allow implementation to not have an interrupt stack (booke).
Use .ident for RCSID
 1.26.4.1  11-Mar-2010  yamt sync with head
 1.28.2.1  30-Apr-2010  uebayasi Sync with HEAD.
 1.29.2.2  12-Jun-2011  rmind sync with head
 1.29.2.1  05-Mar-2011  rmind sync with head
 1.32.2.1  06-Jun-2011  jruoho Sync with HEAD.
 1.34.2.1  08-Feb-2011  bouyer Sync with HEAD
 1.36.2.1  23-Jun-2011  cherry Catchup with rmind-uvmplock merge.
 1.39.12.3  03-Dec-2017  jdolecek update from HEAD
 1.39.12.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.39.12.1  25-Feb-2013  tls resync with head
 1.39.2.2  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.39.2.1  16-Jan-2013  yamt sync with (a bit old) head
 1.41.2.1  18-May-2014  rmind sync with head
 1.46.4.1  04-Feb-2015  martin Pull up following revision(s) (requested by chs in ticket #492):
lib/libc/arch/powerpc64/sys/__vfork14.S: revision 1.2
lib/libc/arch/powerpc64/sys/__syscall.S: revision 1.2
lib/libc/arch/powerpc/sys/__syscall.S: revision 1.3
lib/libc/arch/powerpc64/sys/syscall.S: revision 1.2
lib/libc/arch/powerpc/sys/__clone.S: revision 1.6
lib/libc/arch/powerpc64/gen/__setjmp14.S: revision 1.3
sys/arch/powerpc/include/asm.h: revision 1.47
lib/libc/arch/powerpc64/sys/cerror.S: revision 1.6
lib/libc/arch/powerpc64/sys/getcontext.S: revision 1.5
lib/libc/arch/powerpc64/sys/brk.S: revision 1.5
lib/libc/arch/powerpc64/sys/ptrace.S: revision 1.3
lib/libc/arch/powerpc64/genassym.cf: revision 1.1
lib/libc/arch/powerpc64/gen/__sigsetjmp14.S: revision 1.3
lib/libc/arch/powerpc/sys/getcontext.S: revision 1.6
compat/powerpc64/powerpc/bsd.powerpc.mk: revision 1.3
lib/libc/arch/powerpc64/sys/pipe.S: revision 1.2
lib/libc/arch/powerpc/sys/brk.S: revision 1.14
lib/libc/arch/powerpc64/SYS.h: revision 1.3
lib/libc/arch/powerpc64/sys/fork.S: revision 1.2
lib/libc/arch/powerpc64/sys/__sigtramp2.S: revision 1.4
lib/libc/arch/powerpc64/Makefile.inc: revision 1.3
lib/libc/arch/powerpc/sys/pipe.S: revision 1.9
lib/libc/compiler_rt/Makefile.inc: revision 1.25
lib/libc/arch/powerpc64/sys/sbrk.S: revision 1.4, 1.5
lib/libc/arch/powerpc64/sys/__clone.S: revision 1.2
lib/libc/arch/powerpc/sys/sbrk.S: revision 1.13
lib/libc/arch/powerpc/SYS.h: revision 1.13
powerpc64 uses the same sources as powerpc and needs the long double as
double-double sources.
-
Spell LdAddr consistently
-
Add LDFLAGS+=-Wl,-m,elf32ppc_nbsd
-
Fix cmpptr/cmpreq/etc to use right mnemonics
-
Minimize differences between powerpc and powerpc64
-
Fix powerpc64 assembly to use right instructions for 64bit CPUs.
-
Use hidden for __curbrk and __minbrk to avoid GOT/TOC relocations.
 1.47.2.1  06-Apr-2015  skrll Sync with HEAD
 1.48.22.1  03-Mar-2020  martin Pull up following revision(s) (requested by rin in ticket #755):

sys/arch/evbppc/conf/std.virtex: revision 1.4
sys/arch/powerpc/powerpc/trap_subr.S: revision 1.81
sys/arch/powerpc/ibm4xx/4xx_trap_subr.S: revision 1.8
sys/arch/evbppc/conf/std.walnut: revision 1.9
common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h: revision 1.7
sys/arch/powerpc/include/asm.h: revision 1.49
common/lib/libc/arch/powerpc/atomic/atomic_cas.S: revision 1.9
sys/arch/powerpc/ibm4xx/trap_subr.S: revision 1.28
sys/arch/powerpc/include/lock.h: revision 1.15
sys/arch/evbppc/conf/std.obs266: revision 1.3
common/lib/libc/arch/powerpc/atomic/atomic_swap.S: revision 1.8
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.61
sys/arch/powerpc/powerpc/lock_stubs.S: revision 1.12
sys/arch/evbppc/conf/std.obs200: revision 1.5

Implement workaround for IBM405 Errata 77 (aka CPU_210), where
interrupted stwcx. may errantly write data to memory:

https://elinux.org/images/1/1d/Ppc405gp-errata.pdf

This is because stwcx. is split into two pieces in the pipeline.

We need to
(1) insert dcbt before every stwcx. instruction, as well as
(2) insert sync before every rfi/rfci instruction.

It is unclear which processors are affected, but according to Linux,
all 405-based cores up until 405GPR and 405EP are affected:

https://github.com/torvalds/linux/blob/master/arch/powerpc/platforms/40x/Kconfig#L140

For kernel, this workaround can be restricted to affected processors.

However, for kernel modules and userland, we have to enable it for all
32bit powerpc archs in order to share common binaries as before.
Proposed on port-powerpc:

http://mail-index.netbsd.org/port-powerpc/2020/02/21/msg003583.html
 1.48.18.2  21-Apr-2020  martin Sync with HEAD
 1.48.18.1  08-Apr-2020  martin Merge changes from current as of 20200406
 1.49.4.1  20-Apr-2020  bouyer Sync with HEAD
 1.54.2.1  02-Aug-2025  perseant Sync with HEAD

RSS XML Feed