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    Searched refs:AT91_MSTCLK (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/arch/arm/at91/
at91tctmr.c 198 if (AT91_MSTCLK / 2U / HZ <= 65536) {
199 sc->sc_timerclock = AT91_MSTCLK / 2U;
201 } else if (AT91_MSTCLK / 8U / HZ <= 65536) {
202 sc->sc_timerclock = AT91_MSTCLK / 8U;
204 } else if (AT91_MSTCLK / 32U / HZ <= 65536) {
205 sc->sc_timerclock = AT91_MSTCLK / 32U;
207 } else if (AT91_MSTCLK / 128U / HZ <= 65536) {
208 sc->sc_timerclock = AT91_MSTCLK / 128U;
at91busvar.h 56 #define AT91_MSTCLK at91bus_clocks.master
at91usartreg.h 163 (AT91_MSTCLK / 16 + (speed) / 2) / (speed)); \
at91twi.c 101 if ((cxdiv = (AT91_MSTCLK / (1U << ckdiv)) / (2 * 50000U)) < 256) {
at91bus.c 610 AT91_MSTCLK / 1000000U, (AT91_MSTCLK / 1000U) % 1000U,
at91dbgu.c 233 DBGU_INIT(AT91_MSTCLK, 115200U);
325 sc->sc_brgr = (AT91_MSTCLK / 16 + t->c_ospeed / 2) / t->c_ospeed;
824 DBGU_INIT(AT91_MSTCLK, ospeed);
at91spi.c 212 scbr = speed ? ((AT91_MSTCLK + speed - 1) / speed + 1) & ~1 : -1;
at91usart.c 363 sc->sc_brgr = (AT91_MSTCLK / 16 + t->c_ospeed / 2) / t->c_ospeed;

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