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Searched refs:AboveSafeInc (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
nislands_smc.h	`40 uint8_t AboveSafeInc;`
sislands_smc.h	`42 uint8_t AboveSafeInc;`
radeon_ni_dpm.c	`1784 table->initialState.levels[0].dpm2.AboveSafeInc = 0; 1932 table->ACPIState.levels[0].dpm2.AboveSafeInc = 0; 2501 smc_state->levels[0].dpm2.AboveSafeInc = 0; 2530 smc_state->levels[i].dpm2.AboveSafeInc = NISLANDS_DPM2_ABOVE_SAFE_INC;`
radeon_si_dpm.c	`2324 smc_state->levels[0].dpm2.AboveSafeInc = 0; 2378 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; 4479 table->initialState.levels[0].dpm2.AboveSafeInc = 0; 4620 table->ACPIState.levels[0].dpm2.AboveSafeInc = 0;`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sislands_smc.h	`42 uint8_t AboveSafeInc;`
si_dpm.h	`691 uint8_t AboveSafeInc;`
amdgpu_si_dpm.c	`2422 smc_state->levels[0].dpm2.AboveSafeInc = 0; 2475 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; 4943 table->initialState.levels[0].dpm2.AboveSafeInc = 0; 5085 table->ACPIState.levels[0].dpm2.AboveSafeInc = 0;`

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