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Searched refs:BelowSafeInc (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
nislands_smc.h	`41 uint8_t BelowSafeInc;`
sislands_smc.h	`43 uint8_t BelowSafeInc;`
radeon_ni_dpm.c	`1785 table->initialState.levels[0].dpm2.BelowSafeInc = 0; 1933 table->ACPIState.levels[0].dpm2.BelowSafeInc = 0; 2502 smc_state->levels[0].dpm2.BelowSafeInc = 0; 2531 smc_state->levels[i].dpm2.BelowSafeInc = NISLANDS_DPM2_BELOW_SAFE_INC;`
radeon_si_dpm.c	`2325 smc_state->levels[0].dpm2.BelowSafeInc = 0; 2379 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; 4480 table->initialState.levels[0].dpm2.BelowSafeInc = 0; 4621 table->ACPIState.levels[0].dpm2.BelowSafeInc = 0;`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sislands_smc.h	`43 uint8_t BelowSafeInc;`
si_dpm.h	`692 uint8_t BelowSafeInc;`
amdgpu_si_dpm.c	`2423 smc_state->levels[0].dpm2.BelowSafeInc = 0; 2476 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; 4944 table->initialState.levels[0].dpm2.BelowSafeInc = 0; 5086 table->ACPIState.levels[0].dpm2.BelowSafeInc = 0;`

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