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    Searched refs:CACHE_LINE_SIZE (Results 1 - 25 of 36) sorted by relevancy

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  /src/sys/arch/evbppc/stand/wii/
cache.h 32 #if CACHE_LINE_SIZE != 32
33 #error Incorrect CACHE_LINE_SIZE!
39 uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
40 uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
45 start += CACHE_LINE_SIZE;
53 uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
54 uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
59 start += CACHE_LINE_SIZE;
67 uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
68 uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
    [all...]
miniipc.c 266 if (((uint32_t)buf & (CACHE_LINE_SIZE - 1)) != 0) {
  /src/sys/external/bsd/vchiq/dist/interface/vchiq_arm/
vchiq_pagelist.h 40 #undef CACHE_LINE_SIZE
41 #define CACHE_LINE_SIZE 32
55 char headbuf[CACHE_LINE_SIZE];
56 char tailbuf[CACHE_LINE_SIZE];
  /src/sys/sys/
filedesc.h 123 #define FDFILE_SIZE ((sizeof(fdfile_t)+CACHE_LINE_SIZE-1)/CACHE_LINE_SIZE*CACHE_LINE_SIZE)
param.h 153 #ifndef CACHE_LINE_SIZE
154 #define CACHE_LINE_SIZE 64
pool.h 281 __aligned(CACHE_LINE_SIZE);
285 pool_cache_cpu_t pc_cpu0 __aligned(CACHE_LINE_SIZE);
  /src/sys/external/bsd/drm2/linux/
linux_atomic64.c 59 char pad[CACHE_LINE_SIZE -
61 } atomic64_tab[PAGE_SIZE/CACHE_LINE_SIZE] __cacheline_aligned;
63 CTASSERT(sizeof(atomic64_tab[0]) == CACHE_LINE_SIZE);
93 return ((uintptr_t)a >> ilog2(CACHE_LINE_SIZE)) %
linux_wait_bit.c 51 char pad[CACHE_LINE_SIZE - sizeof(struct waitbitentry)];
52 } waitbittab[PAGE_SIZE/CACHE_LINE_SIZE] __cacheline_aligned;
54 CTASSERT(sizeof(waitbittab[0]) == CACHE_LINE_SIZE);
86 return ((uintptr_t)word >> ilog2(CACHE_LINE_SIZE)) %
  /src/sys/dev/pci/
if_enavar.h 210 } __aligned(CACHE_LINE_SIZE);
216 } __aligned(CACHE_LINE_SIZE);
326 } __aligned(CACHE_LINE_SIZE);
400 __aligned(CACHE_LINE_SIZE); /* stable */
404 __aligned(CACHE_LINE_SIZE);
408 __aligned(CACHE_LINE_SIZE);
  /src/sys/arch/aarch64/include/
param.h 147 #define CACHE_LINE_SIZE 128
  /src/sys/kern/
kern_lock.c 74 __cpu_simple_lock_t lock __aligned(CACHE_LINE_SIZE);
76 } kernel_lock_cacheline[CACHE_LINE_SIZE / sizeof(struct kernel_lock)]
240 CTASSERT(CACHE_LINE_SIZE >= sizeof(__cpu_simple_lock_t));
subr_ipi.c 73 #define IPI_MSG_SLOTS (CACHE_LINE_SIZE / sizeof(ipi_msg_t *))
  /src/sys/dev/usb/
ohcireg.h 189 #define OHCI_ED_ALLOC_ALIGN MAX(OHCI_ED_ALIGN, CACHE_LINE_SIZE)
227 #define OHCI_TD_ALLOC_ALIGN MAX(OHCI_TD_ALIGN, CACHE_LINE_SIZE)
263 #define OHCI_ITD_ALLOC_ALIGN MAX(OHCI_ITD_ALIGN, CACHE_LINE_SIZE)
ehcireg.h 252 #define EHCI_ITD_ALLOC_ALIGN MAX(EHCI_ITD_ALIGN, CACHE_LINE_SIZE)
346 #define EHCI_QTD_ALLOC_ALIGN MAX(EHCI_QTD_ALIGN, CACHE_LINE_SIZE)
400 #define EHCI_QH_ALLOC_ALIGN MAX(EHCI_QH_ALIGN, CACHE_LINE_SIZE)
  /src/sys/arch/mips/include/
mips_param.h 115 #define CACHE_LINE_SIZE 128
  /src/sys/arch/riscv/riscv/
cpu.c 66 u_int riscv_dcache_align = CACHE_LINE_SIZE;
67 u_int riscv_dcache_align_mask = CACHE_LINE_SIZE - 1;
pmap_machdep.c 466 pmap_pvlist_lock_init(CACHE_LINE_SIZE);
  /src/sys/netinet/
tcp_vtw.h 154 #if CACHE_LINE_SIZE >= 128
165 #define FATP_NTAGS (CACHE_LINE_SIZE / sizeof(fatp_word_t) - 1)
tcp_vtw.c 259 CTASSERT(CACHE_LINE_SIZE == 32 ||
260 CACHE_LINE_SIZE == 64 ||
261 CACHE_LINE_SIZE == 128 ||
262 CACHE_LINE_SIZE == 256);
280 CTASSERT(CACHE_LINE_SIZE == 32 ||
281 CACHE_LINE_SIZE == 64 ||
282 CACHE_LINE_SIZE == 128 ||
283 CACHE_LINE_SIZE == 256);
301 CTASSERT(CACHE_LINE_SIZE == 32 ||
302 CACHE_LINE_SIZE == 64 |
    [all...]
  /src/sys/arch/ia64/ia64/
cpu.c 50 struct cpu_info cpu_info_primary __aligned(CACHE_LINE_SIZE);
  /src/sys/arch/xen/x86/
cpu.c 153 struct cpu_info cpu_info_primary __aligned(CACHE_LINE_SIZE) = {
160 struct cpu_info phycpu_info_primary __aligned(CACHE_LINE_SIZE) = {
214 ptr = (uintptr_t)kmem_zalloc(sizeof(*ci) + CACHE_LINE_SIZE - 1,
216 ci = (struct cpu_info *)roundup2(ptr, CACHE_LINE_SIZE);
381 ptr = (uintptr_t)kmem_alloc(sizeof(*ci) + CACHE_LINE_SIZE - 1,
383 ci = (struct cpu_info *)roundup2(ptr, CACHE_LINE_SIZE);
  /src/sys/arch/sparc/sparc/
timer.c 97 } cntr __aligned(CACHE_LINE_SIZE);
  /src/sys/dev/hyperv/
vmbusvar.h 168 } __aligned(CACHE_LINE_SIZE);
  /src/sys/external/bsd/common/include/linux/
slab.h 206 align = roundup(MAX(1, align), CACHE_LINE_SIZE);
  /src/sys/rump/librump/rumpkern/
scheduler.c 68 int rcpu_align[0] __aligned(CACHE_LINE_SIZE);
95 * stats happen to be on a different cache line (CACHE_LINE_SIZE is

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