Searched refs:CLKID_FCLK_DIV3 (Results 1 - 18 of 18) sorted by relevance
| /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/ |
| H A D | amlogic,a1-pll-clkc.h | 22 #define CLKID_FCLK_DIV3 7 macro
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| H A D | amlogic,c3-pll-clkc.h | 19 #define CLKID_FCLK_DIV3 7 macro
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| H A D | amlogic,s4-pll-clkc.h | 17 #define CLKID_FCLK_DIV3 5 macro
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| H A D | axg-clkc.h | 16 #define CLKID_FCLK_DIV3 3 macro
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| H A D | gxbb-clkc.h | 15 #define CLKID_FCLK_DIV3 5 macro
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| H A D | meson8b-clkc.h | 15 #define CLKID_FCLK_DIV3 6 macro
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| H A D | g12a-clkc.h | 16 #define CLKID_FCLK_DIV3 3 macro
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| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-g12.dtsi | 83 <&clkc CLKID_FCLK_DIV3>,
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| H A D | amlogic-c3.dtsi | 127 <&clkc_pll CLKID_FCLK_DIV3>,
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| H A D | meson-a1.dtsi | 302 <&clkc_pll CLKID_FCLK_DIV3>,
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| H A D | meson-sm1.dtsi | 163 <&clkc CLKID_FCLK_DIV3>,
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| H A D | meson-gxbb.dtsi | 773 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
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| H A D | meson-gxl.dtsi | 843 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
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| H A D | meson-s4.dtsi | 110 <&clkc_pll CLKID_FCLK_DIV3>,
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| H A D | meson-axg.dtsi | 1343 <&clkc CLKID_FCLK_DIV3>,
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| H A D | meson-g12-common.dtsi | 1658 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
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| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/amlogic/ |
| H A D | meson8.dtsi | 729 <&clkc CLKID_FCLK_DIV3>,
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| H A D | meson8b.dtsi | 704 <&clkc CLKID_FCLK_DIV3>,
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