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Searched refs:CLKID_FCLK_DIV3 (Results 1 - 12 of 12) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
axg-clkc.h	`16 #define CLKID_FCLK_DIV3 3`
meson8b-clkc.h	`15 #define CLKID_FCLK_DIV3 6`
g12a-clkc.h	`16 #define CLKID_FCLK_DIV3 3`
gxbb-clkc.h	`15 #define CLKID_FCLK_DIV3 5`
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amlogic/
meson-g12.dtsi	`83 <&clkc CLKID_FCLK_DIV3>,`
meson-sm1.dtsi	`181 <&clkc CLKID_FCLK_DIV3>,`
meson-gxbb.dtsi	`753 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,`
meson-gxl.dtsi	`822 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,`
meson-axg.dtsi	`1312 <&clkc CLKID_FCLK_DIV3>,`
meson-g12-common.dtsi	`1680 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,`
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
meson8.dtsi	`710 <&clkc CLKID_FCLK_DIV3>,`
meson8b.dtsi	`702 <&clkc CLKID_FCLK_DIV3>,`

Completed in 18 milliseconds