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    Searched refs:CLK_TOP_UNIVPLL2_D4 (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt8135-clk.h 51 #define CLK_TOP_UNIVPLL2_D4 38
mt7629-clk.h 57 #define CLK_TOP_UNIVPLL2_D4 45
mt6765-clk.h 64 #define CLK_TOP_UNIVPLL2_D4 27
mt6797-clk.h 75 #define CLK_TOP_UNIVPLL2_D4 63
mt7622-clk.h 51 #define CLK_TOP_UNIVPLL2_D4 37
mt8173-clk.h 80 #define CLK_TOP_UNIVPLL2_D4 68
mt2701-clk.h 42 #define CLK_TOP_UNIVPLL2_D4 30
mt2712-clk.h 64 #define CLK_TOP_UNIVPLL2_D4 31
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt2712e.dtsi 554 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
633 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
646 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
659 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
672 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
mt7629.dtsi 254 <&topckgen CLK_TOP_UNIVPLL2_D4>;
324 <&topckgen CLK_TOP_UNIVPLL2_D4>,
386 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>,

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