Searched refs:CLK_TOP_UNIVPLL_D6_D2 (Results 1 - 5 of 5) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8192-clk.h110 #define CLK_TOP_UNIVPLL_D6_D2 96 macro
H A Dmediatek,mt8188-clk.h134 #define CLK_TOP_UNIVPLL_D6_D2 121 macro
H A Dmt8195-clk.h167 #define CLK_TOP_UNIVPLL_D6_D2 153 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8188.dtsi1381 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1405 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1418 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1431 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1444 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1457 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
H A Dmt8195.dtsi1117 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1177 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1191 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1205 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1219 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1233 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,

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