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Searched refs:CLK_TOP_VENC_SEL (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt8135-clk.h	`88 #define CLK_TOP_VENC_SEL 75`
mt8173-clk.h	`100 #define CLK_TOP_VENC_SEL 88`
mt2712-clk.h	`137 #define CLK_TOP_VENC_SEL 104`
mt8192-clk.h	`65 #define CLK_TOP_VENC_SEL 51`
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt8173.dtsi	`475 <&topckgen CLK_TOP_VENC_SEL>; 1479 clocks = <&topckgen CLK_TOP_VENC_SEL>; 1481 assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;`
mt2712e.dtsi	`287 <&topckgen CLK_TOP_VENC_SEL>,`

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