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Searched
refs:DBG_INIT
(Results
1 - 9
of
9
) sorted by relevancy
/src/sys/dev/ic/
arn9280.c
128
DPRINTFN(
DBG_INIT
, sc, "AR_AN_TOP2 fixup required\n");
137
DPRINTFN(
DBG_INIT
, sc, "Rx gain type=0x%x\n", type);
152
DPRINTFN(
DBG_INIT
, sc, "Tx gain type=0x%x\n", type);
athnvar.h
39
#define
DBG_INIT
__BIT(0)
athn.c
212
DPRINTFN(
DBG_INIT
, sc,
216
DPRINTFN(
DBG_INIT
, sc, "%zd key cache entries\n", sc->sc_kc_entries);
230
DPRINTFN(
DBG_INIT
, sc, "using %s loop power control\n",
232
DPRINTFN(
DBG_INIT
, sc, "txchainmask=0x%x rxchainmask=0x%x\n",
693
DPRINTFN(
DBG_INIT
, sc, "RTC not waking up\n");
728
DPRINTFN(
DBG_INIT
, sc, "RTC stuck in MAC reset\n");
762
DPRINTFN(
DBG_INIT
, sc, "RTC not waking up\n");
823
DPRINTFN(
DBG_INIT
, sc, "AR_RTC_PLL_CONTROL=0x%08x\n", pll);
arn9003.c
409
DPRINTFN(
DBG_INIT
, sc, "unknown template image %d\n",
430
DPRINTFN(
DBG_INIT
, sc, "ROM chunk @%zd/%zd\n",
440
DPRINTFN(
DBG_INIT
, sc, "block length mismatch %zd\n",
481
DPRINTFN(
DBG_INIT
, sc,
503
DPRINTFN(
DBG_INIT
, sc,
3221
DPRINTFN(
DBG_INIT
, sc, "writing pre and core init vals\n");
3249
DPRINTFN(
DBG_INIT
, sc, "writing post init vals\n");
3272
DPRINTFN(
DBG_INIT
, sc, "writing fast pll clock init vals\n");
arn5008.c
306
DPRINTFN(
DBG_INIT
, sc,
311
DPRINTFN(
DBG_INIT
, sc, "non-native ROM endianness\n");
324
DPRINTFN(
DBG_INIT
, sc,
2391
DPRINTFN(
DBG_INIT
, sc, "writing modal init vals\n");
2421
DPRINTFN(
DBG_INIT
, sc, "writing common init vals\n");
2445
DPRINTFN(
DBG_INIT
, sc, "writing fast pll clock init vals\n");
arn9285.c
692
DPRINTFN(
DBG_INIT
, sc, "CLC threshold=%d\n", thresh);
/src/sys/dev/usb/
if_urtwn.c
90
#define
DBG_INIT
__BIT(0)
681
DPRINTFN(
DBG_INIT
, "found %jd/%jd bulk-in/out pipes",
1350
DPRINTFN(
DBG_INIT
, "%04jx: %02jx", i, rom[i], 0, 0);
1515
DPRINTFN(
DBG_INIT
,
1674
DPRINTFN(
DBG_INIT
, "mode=%#jx", mode, 0, 0, 0);
1675
DPRINTFN(
DBG_INIT
, "rates=%#jx, basicrates=%#jx, "
1696
DPRINTFN(
DBG_INIT
, "maxbasicrate=%jd", maxbasicrate, 0, 0, 0);
1710
DPRINTFN(
DBG_INIT
, "maxrate=%jd", maxrate, 0, 0, 0);
3562
DPRINTFN(
DBG_INIT
, "FW V%jd.%jd",
3564
DPRINTFN(
DBG_INIT
, "%02jd-%02jd %02jd:%02jd"
[
all
...]
if_otus.c
76
#define
DBG_INIT
__BIT(0)
915
DPRINTFN(DBG_FN |
DBG_INIT
, sc, "regdomain=0x%04x\n", domain);
1590
DPRINTFN(
DBG_INIT
, sc, "rate=0x%02x ridx=%d\n",
2473
DPRINTFN(DBG_FN |
DBG_INIT
, sc, "\n");
3169
DPRINTFN(DBG_FN |
DBG_INIT
, sc, "\n");
if_athn_usb.c
1204
DPRINTFN(
DBG_INIT
, usc,
2848
DPRINTFN(
DBG_INIT
, sc, "creating VAP\n");
2862
DPRINTFN(
DBG_INIT
| DBG_NODES, sc, "creating default node %u\n",
2877
DPRINTFN(
DBG_INIT
, sc, "updating target configuration\n");
Completed in 26 milliseconds
Indexes created Mon Oct 20 16:09:52 GMT 2025