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    Searched refs:DPG_PIPE_STUTTER_CONTROL (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_mem_input.h 56 SRI(DPG_PIPE_STUTTER_CONTROL, DMIF_PG, id),\
114 uint32_t DPG_PIPE_STUTTER_CONTROL;
183 SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_ENABLE, mask_sh),\
184 SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_IGNORE_FBC, mask_sh),\
189 SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_EXIT_SELF_REFRESH_WATERMARK, mask_sh),\
amdgpu_dce_mem_input.c 247 REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,
264 REG_UPDATE(DPG_PIPE_STUTTER_CONTROL,
284 REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,
313 REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,
346 REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,
  /src/sys/external/bsd/drm2/dist/drm/radeon/
cikd.h 978 #define DPG_PIPE_STUTTER_CONTROL 0x6cd4
sid.h 904 #define DPG_PIPE_STUTTER_CONTROL 0x6cd4
radeon_ci_dpm.c 2938 (RREG32(DPG_PIPE_STUTTER_CONTROL) & STUTTER_ENABLE) &&
radeon_si_dpm.c 5007 (RREG32(DPG_PIPE_STUTTER_CONTROL) & STUTTER_ENABLE) &&
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h 908 #define DPG_PIPE_STUTTER_CONTROL 0x1B35
amdgpu_si_dpm.c 5471 (RREG32(DPG_PIPE_STUTTER_CONTROL) & STUTTER_ENABLE) &&
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_fiji_smumgr.c 1212 (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL,
amdgpu_vegam_smumgr.c 1020 (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL,
amdgpu_polaris10_smumgr.c 1116 (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL,
amdgpu_tonga_smumgr.c 1027 && (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL, STUTTER_ENABLE) & 0x1)

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