Searched refs:MASTER_QUP_CORE_0 (Results 1 - 25 of 30) sorted by relevance

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/src/sys/external/gpl2/dts/dist/include/dt-bindings/interconnect/
H A Dqcom,qcm2290.h82 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,qdu1000-rpmh.h11 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sdx75.h12 #define MASTER_QUP_CORE_0 1 macro
H A Dqcom,sm6115.h99 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sc7280.h38 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sm8450.h35 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sm8550-rpmh.h29 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sm8650-rpmh.h30 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,x1e80100-rpmh.h28 #define MASTER_QUP_CORE_0 1 macro
H A Dqcom,sm6350.h34 #define MASTER_QUP_CORE_0 3 macro
H A Dqcom,sc8180x.h184 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sm8250.h171 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sc7180.h140 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sa8775p-rpmh.h38 #define MASTER_QUP_CORE_0 0 macro
H A Dqcom,sc8280xp.h54 #define MASTER_QUP_CORE_0 1 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/
H A Dsdx75.dtsi531 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
549 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
572 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
590 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
614 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
637 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
660 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
683 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
704 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
722 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAY
[all...]
H A Dqcm2290.dtsi1048 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1073 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1092 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1112 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1137 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1159 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1184 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1206 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1231 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1253 interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TA
[all...]
H A Dsc8180x.dtsi815 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
830 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
844 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
856 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
871 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
885 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
897 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
912 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
926 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
938 interconnects = <&qup_virt MASTER_QUP_CORE_0
[all...]
H A Dsm6115.dtsi1289 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1314 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1339 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1364 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1389 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1414 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1439 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1464 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1486 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
1506 interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TA
[all...]
H A Dsc7180.dtsi899 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
921 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
937 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
953 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
975 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
991 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1007 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1027 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1043 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1065 interconnects = <&qup_virt MASTER_QUP_CORE_0
[all...]
H A Dsc7280.dtsi1110 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1135 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1154 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1170 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1195 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1214 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1230 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1255 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1274 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1290 interconnects = <&clk_virt MASTER_QUP_CORE_0
[all...]
H A Dsm8250.dtsi1373 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1395 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1418 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1440 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1463 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1485 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1506 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1525 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1547 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
1570 interconnects = <&qup_virt MASTER_QUP_CORE_0
[all...]
H A Dsc8280xp.dtsi1194 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1210 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1226 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1242 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1258 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1274 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1289 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1304 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1320 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1336 interconnects = <&clk_virt MASTER_QUP_CORE_0
[all...]
H A Dx1e80100.dtsi1991 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2024 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2057 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2090 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2123 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2156 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2178 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2211 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2244 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
2277 interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAY
[all...]
H A Dsm8450.dtsi1128 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>;
1145 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1165 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1187 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1205 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1227 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1245 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1268 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1286 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
1308 interconnects = <&clk_virt MASTER_QUP_CORE_0
[all...]

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