NetBSD Cross-Reference & Source Code Search Engine

Home	Sort by: relevance \| last modified time \| path

Full Search

in project(s):

Definition

Symbol

File Path

History

| | Help

Searched refs:SMC_SYSCON_CLOCK_CNTL_0 (Results 1 - 15 of 15) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_ci_smc.c	`144 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); 148 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); 153 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); 157 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); 162 u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); 181 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);`
radeon_si_smc.c	`150 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); 154 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); 159 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); 163 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); 169 u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); 207 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);`
cikd.h	`76 #define SMC_SYSCON_CLOCK_CNTL_0 0x80000004`
sid.h	`72 #define SMC_SYSCON_CLOCK_CNTL_0 0x80000004`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si_smc.c	`148 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); 155 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); 161 u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); 199 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);`
amdgpu_vi.c	`1084 if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) &&`
sid.h	`74 #define SMC_SYSCON_CLOCK_CNTL_0 0x80000004`
amdgpu_cik.c	`1910 if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) &&`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_smu7_smumgr.c	`167 return ((0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable))`
amdgpu_fiji_smumgr.c	`124 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); 192 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);`
amdgpu_iceland_smumgr.c	`133 SMC_SYSCON_CLOCK_CNTL_0, 140 SMC_SYSCON_CLOCK_CNTL_0,`
amdgpu_vegam_smumgr.c	`124 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); 184 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);`
amdgpu_ci_smumgr.c	`194 CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) 1904 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); 2365 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 1);`
amdgpu_polaris10_smumgr.c	`223 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); 283 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);`
amdgpu_tonga_smumgr.c	`120 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); 186 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);`

Completed in 89 milliseconds