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Searched refs:SPLL_FB_DIV_MASK (Results 1 - 18 of 18) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
rv740d.h	`41 #define SPLL_FB_DIV_MASK (0x3ffffff << 0)`
rv730d.h	`44 #define SPLL_FB_DIV_MASK (0x3ffffff << 0)`
rs780d.h	`35 # define SPLL_FB_DIV_MASK (0xff << 2)`
radeon_rv740_dpm.c	`159 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;`
radeon_rv730_dpm.c	`91 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;`
radeon_rs780_dpm.c	`217 u32 fbdiv = (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT;`
rv770d.h	`108 #define SPLL_FB_DIV_MASK (0x3ffffff << 0)`
nid.h	`554 #define SPLL_FB_DIV_MASK (0x3ffffff << 0)`
cikd.h	`264 #define SPLL_FB_DIV_MASK (0x3ffffff << 0)`
sid.h	`103 #define SPLL_FB_DIV_MASK (0x3ffffff << 0)`
evergreend.h	`90 #define SPLL_FB_DIV_MASK (0x3ffffff << 0)`
r600d.h	`1278 # define SPLL_FB_DIV_MASK (0xff << 5)`
radeon_rv770_dpm.c	`538 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;`
radeon_ni_dpm.c	`2040 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK; 2121 fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT;`
radeon_si_dpm.c	`2877 fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; 4822 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;`
radeon_ci_dpm.c	`3189 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h	`105 #define SPLL_FB_DIV_MASK (0x3ffffff << 0)`
amdgpu_si_dpm.c	`2976 fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; 5286 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK;`

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