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    Searched refs:SPLL_REF_DIV_MASK (Results 1 - 17 of 17) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
rv740d.h 33 #define SPLL_REF_DIV_MASK (0x3f << 4)
rv730d.h 34 #define SPLL_REF_DIV_MASK (0x3f << 4)
rs780d.h 32 # define SPLL_REF_DIV_MASK (7 << 2)
radeon_rv740_dpm.c 152 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
radeon_rs780_dpm.c 995 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
1018 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
radeon_rv730_dpm.c 83 spll_func_cntl &= ~(SPLL_HILEN_MASK | SPLL_LOLEN_MASK | SPLL_REF_DIV_MASK);
rv770d.h 97 #define SPLL_REF_DIV_MASK (0x3f << 4)
nid.h 545 #define SPLL_REF_DIV_MASK (0x3f << 4)
cikd.h 255 #define SPLL_REF_DIV_MASK (0x3f << 5)
sid.h 92 #define SPLL_REF_DIV_MASK (0x3f << 4)
evergreend.h 81 #define SPLL_REF_DIV_MASK (0x3f << 4)
r600d.h 1276 # define SPLL_REF_DIV_MASK (7 << 2)
radeon_rv770_dpm.c 530 spll_func_cntl &= ~(SPLL_HILEN_MASK | SPLL_LOLEN_MASK | SPLL_REF_DIV_MASK);
radeon_ni_dpm.c 2033 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
radeon_si_dpm.c 4815 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h 94 #define SPLL_REF_DIV_MASK (0x3f << 4)
amdgpu_si_dpm.c 5279 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);

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