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    Searched refs:SVI2Enable (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu71_discrete.h 307 uint8_t SVI2Enable;
smu7_discrete.h 374 uint8_t SVI2Enable;
smu72_discrete.h 311 uint8_t SVI2Enable;
smu73_discrete.h 295 uint8_t SVI2Enable;
smu74_discrete.h 329 uint8_t SVI2Enable;
smu75_discrete.h 335 uint8_t SVI2Enable;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
smu7_discrete.h 373 uint8_t SVI2Enable;
radeon_ci_dpm.c 3675 table->SVI2Enable = 1;
3677 table->SVI2Enable = 0;
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_iceland_smumgr.c 1918 tab->SVI2Enable |= VDDC_ON_SVI2;
1921 tab->SVI2Enable |= VDDCI_ON_SVI2;
1926 tab->SVI2Enable |= MVDD_ON_SVI2;
1928 PP_ASSERT_WITH_CODE(tab->SVI2Enable != (VDDC_ON_SVI2 | VDDCI_ON_SVI2 | MVDD_ON_SVI2) &&
1929 (tab->SVI2Enable & VDDC_ON_SVI2), "SVI2 domain configuration is incorrect!", return -EINVAL);
amdgpu_ci_smumgr.c 1892 table->SVI2Enable = 1;
1894 table->SVI2Enable = 0;

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