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Searched refs:UVD_CGC_CTRL__MPC_MODE_MASK (Results 1 - 14 of 14) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c	`513 \| UVD_CGC_CTRL__MPC_MODE_MASK 614 \| UVD_CGC_CTRL__MPC_MODE_MASK 672 UVD_CGC_CTRL__MPC_MODE_MASK \|`
amdgpu_vcn_v2_0.c	`506 \| UVD_CGC_CTRL__MPC_MODE_MASK 582 UVD_CGC_CTRL__MPC_MODE_MASK \| 641 \| UVD_CGC_CTRL__MPC_MODE_MASK`
amdgpu_vcn_v2_5.c	`596 \| UVD_CGC_CTRL__MPC_MODE_MASK 673 UVD_CGC_CTRL__MPC_MODE_MASK \| 735 \| UVD_CGC_CTRL__MPC_MODE_MASK`
amdgpu_uvd_v5_0.c	`683 UVD_CGC_CTRL__MPC_MODE_MASK \|`
amdgpu_uvd_v6_0.c	`1338 UVD_CGC_CTRL__MPC_MODE_MASK \|`
amdgpu_uvd_v7_0.c	`1623 UVD_CGC_CTRL__MPC_MODE_MASK \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h	`50 #define UVD_CGC_CTRL__MPC_MODE_MASK 0x02000000L`
uvd_4_2_sh_mask.h	`257 #define UVD_CGC_CTRL__MPC_MODE_MASK 0x2000000`
uvd_5_0_sh_mask.h	`279 #define UVD_CGC_CTRL__MPC_MODE_MASK 0x2000000`
uvd_6_0_sh_mask.h	`281 #define UVD_CGC_CTRL__MPC_MODE_MASK 0x2000000`
uvd_7_0_sh_mask.h	`460 #define UVD_CGC_CTRL__MPC_MODE_MASK 0x02000000L`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`953 #define UVD_CGC_CTRL__MPC_MODE_MASK 0x02000000L`
vcn_2_0_0_sh_mask.h	`1972 #define UVD_CGC_CTRL__MPC_MODE_MASK 0x02000000L`
vcn_2_5_sh_mask.h	`2021 #define UVD_CGC_CTRL__MPC_MODE_MASK 0x02000000L`

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