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    Searched refs:UVD_CGC_CTRL__SCPU_MODE_MASK (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 518 | UVD_CGC_CTRL__SCPU_MODE_MASK);
619 | UVD_CGC_CTRL__SCPU_MODE_MASK);
677 UVD_CGC_CTRL__SCPU_MODE_MASK);
amdgpu_vcn_v2_0.c 511 | UVD_CGC_CTRL__SCPU_MODE_MASK);
587 UVD_CGC_CTRL__SCPU_MODE_MASK);
646 | UVD_CGC_CTRL__SCPU_MODE_MASK);
amdgpu_uvd_v5_0.c 689 UVD_CGC_CTRL__SCPU_MODE_MASK);
amdgpu_uvd_v6_0.c 1344 UVD_CGC_CTRL__SCPU_MODE_MASK |
amdgpu_uvd_v7_0.c 1630 UVD_CGC_CTRL__SCPU_MODE_MASK);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 60 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000L
uvd_4_2_sh_mask.h 267 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000
uvd_5_0_sh_mask.h 289 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000
uvd_6_0_sh_mask.h 291 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000
uvd_7_0_sh_mask.h 465 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000L
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 958 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000L
vcn_2_0_0_sh_mask.h 1977 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000L

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