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Searched refs:UVD_CGC_CTRL__UDEC_CM_MODE_MASK (Results 1 - 14 of 14) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c	`500 \| UVD_CGC_CTRL__UDEC_CM_MODE_MASK 601 \| UVD_CGC_CTRL__UDEC_CM_MODE_MASK 659 UVD_CGC_CTRL__UDEC_CM_MODE_MASK \|`
amdgpu_vcn_v2_0.c	`493 \| UVD_CGC_CTRL__UDEC_CM_MODE_MASK 569 UVD_CGC_CTRL__UDEC_CM_MODE_MASK \| 628 \| UVD_CGC_CTRL__UDEC_CM_MODE_MASK`
amdgpu_vcn_v2_5.c	`583 \| UVD_CGC_CTRL__UDEC_CM_MODE_MASK 660 UVD_CGC_CTRL__UDEC_CM_MODE_MASK \| 722 \| UVD_CGC_CTRL__UDEC_CM_MODE_MASK`
amdgpu_uvd_v5_0.c	`670 UVD_CGC_CTRL__UDEC_CM_MODE_MASK \|`
amdgpu_uvd_v6_0.c	`1325 UVD_CGC_CTRL__UDEC_CM_MODE_MASK \|`
amdgpu_uvd_v7_0.c	`1610 UVD_CGC_CTRL__UDEC_CM_MODE_MASK \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h	`64 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x00001000L`
uvd_4_2_sh_mask.h	`231 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x1000`
uvd_5_0_sh_mask.h	`253 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x1000`
uvd_6_0_sh_mask.h	`255 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x1000`
uvd_7_0_sh_mask.h	`447 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x00001000L`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`940 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x00001000L`
vcn_2_0_0_sh_mask.h	`1959 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x00001000L`
vcn_2_5_sh_mask.h	`2008 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x00001000L`

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