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Searched refs:UVD_CGC_CTRL__UDEC_DB_MODE_MASK (Results 1 - 14 of 14) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c	`502 \| UVD_CGC_CTRL__UDEC_DB_MODE_MASK 603 \| UVD_CGC_CTRL__UDEC_DB_MODE_MASK 661 UVD_CGC_CTRL__UDEC_DB_MODE_MASK \|`
amdgpu_vcn_v2_0.c	`495 \| UVD_CGC_CTRL__UDEC_DB_MODE_MASK 571 UVD_CGC_CTRL__UDEC_DB_MODE_MASK \| 630 \| UVD_CGC_CTRL__UDEC_DB_MODE_MASK`
amdgpu_vcn_v2_5.c	`585 \| UVD_CGC_CTRL__UDEC_DB_MODE_MASK 662 UVD_CGC_CTRL__UDEC_DB_MODE_MASK \| 724 \| UVD_CGC_CTRL__UDEC_DB_MODE_MASK`
amdgpu_uvd_v5_0.c	`672 UVD_CGC_CTRL__UDEC_DB_MODE_MASK \|`
amdgpu_uvd_v6_0.c	`1327 UVD_CGC_CTRL__UDEC_DB_MODE_MASK \|`
amdgpu_uvd_v7_0.c	`1612 UVD_CGC_CTRL__UDEC_DB_MODE_MASK \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h	`66 #define UVD_CGC_CTRL__UDEC_DB_MODE_MASK 0x00004000L`
uvd_4_2_sh_mask.h	`235 #define UVD_CGC_CTRL__UDEC_DB_MODE_MASK 0x4000`
uvd_5_0_sh_mask.h	`257 #define UVD_CGC_CTRL__UDEC_DB_MODE_MASK 0x4000`
uvd_6_0_sh_mask.h	`259 #define UVD_CGC_CTRL__UDEC_DB_MODE_MASK 0x4000`
uvd_7_0_sh_mask.h	`449 #define UVD_CGC_CTRL__UDEC_DB_MODE_MASK 0x00004000L`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`942 #define UVD_CGC_CTRL__UDEC_DB_MODE_MASK 0x00004000L`
vcn_2_0_0_sh_mask.h	`1961 #define UVD_CGC_CTRL__UDEC_DB_MODE_MASK 0x00004000L`
vcn_2_5_sh_mask.h	`2010 #define UVD_CGC_CTRL__UDEC_DB_MODE_MASK 0x00004000L`

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