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Searched refs:UVD_CGC_CTRL__WCB_MODE_MASK (Results 1 - 14 of 14) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c	`516 \| UVD_CGC_CTRL__WCB_MODE_MASK 617 \| UVD_CGC_CTRL__WCB_MODE_MASK 675 UVD_CGC_CTRL__WCB_MODE_MASK \|`
amdgpu_vcn_v2_0.c	`509 \| UVD_CGC_CTRL__WCB_MODE_MASK 585 UVD_CGC_CTRL__WCB_MODE_MASK \| 644 \| UVD_CGC_CTRL__WCB_MODE_MASK`
amdgpu_vcn_v2_5.c	`599 \| UVD_CGC_CTRL__WCB_MODE_MASK 676 UVD_CGC_CTRL__WCB_MODE_MASK \| 738 \| UVD_CGC_CTRL__WCB_MODE_MASK`
amdgpu_uvd_v5_0.c	`686 UVD_CGC_CTRL__WCB_MODE_MASK \|`
amdgpu_uvd_v6_0.c	`1341 UVD_CGC_CTRL__WCB_MODE_MASK \|`
amdgpu_uvd_v7_0.c	`1626 UVD_CGC_CTRL__WCB_MODE_MASK \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h	`78 #define UVD_CGC_CTRL__WCB_MODE_MASK 0x10000000L`
uvd_4_2_sh_mask.h	`263 #define UVD_CGC_CTRL__WCB_MODE_MASK 0x10000000`
uvd_5_0_sh_mask.h	`285 #define UVD_CGC_CTRL__WCB_MODE_MASK 0x10000000`
uvd_6_0_sh_mask.h	`287 #define UVD_CGC_CTRL__WCB_MODE_MASK 0x10000000`
uvd_7_0_sh_mask.h	`463 #define UVD_CGC_CTRL__WCB_MODE_MASK 0x10000000L`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`956 #define UVD_CGC_CTRL__WCB_MODE_MASK 0x10000000L`
vcn_2_0_0_sh_mask.h	`1975 #define UVD_CGC_CTRL__WCB_MODE_MASK 0x10000000L`
vcn_2_5_sh_mask.h	`2024 #define UVD_CGC_CTRL__WCB_MODE_MASK 0x10000000L`

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