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Searched refs:UVD_SUVD_CGC_GATE__SRE_MASK (Results 1 - 12 of 12) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_uvd_v5_0.c	`614 suvd_flags = UVD_SUVD_CGC_GATE__SRE_MASK \| 727 suvd_flags = UVD_SUVD_CGC_GATE__SRE_MASK \|`
amdgpu_uvd_v6_0.c	`645 data1 \|= UVD_SUVD_CGC_GATE__SRE_MASK \| 678 data1 &= ~(UVD_SUVD_CGC_GATE__SRE_MASK \| 1260 data1 \|= UVD_SUVD_CGC_GATE__SRE_MASK \| 1385 suvd_flags = UVD_SUVD_CGC_GATE__SRE_MASK \|`
amdgpu_uvd_v7_0.c	`1599 suvd_flags = UVD_SUVD_CGC_GATE__SRE_MASK \| 1672 suvd_flags = UVD_SUVD_CGC_GATE__SRE_MASK \|`
amdgpu_vcn_v1_0.c	`523 data \|= (UVD_SUVD_CGC_GATE__SRE_MASK`
amdgpu_vcn_v2_0.c	`516 data \|= (UVD_SUVD_CGC_GATE__SRE_MASK`
amdgpu_vcn_v2_5.c	`606 data \|= (UVD_SUVD_CGC_GATE__SRE_MASK`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_sh_mask.h	`725 #define UVD_SUVD_CGC_GATE__SRE_MASK 0x1`
uvd_6_0_sh_mask.h	`727 #define UVD_SUVD_CGC_GATE__SRE_MASK 0x1`
uvd_7_0_sh_mask.h	`228 #define UVD_SUVD_CGC_GATE__SRE_MASK 0x00000001L`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`456 #define UVD_SUVD_CGC_GATE__SRE_MASK 0x00000001L`
vcn_2_0_0_sh_mask.h	`3211 #define UVD_SUVD_CGC_GATE__SRE_MASK 0x00000001L`
vcn_2_5_sh_mask.h	`2085 #define UVD_SUVD_CGC_GATE__SRE_MASK 0x00000001L`

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