| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| smu7_discrete.h | 334 SMU7_Discrete_Ulv Ulv;
|
| smu72_discrete.h | 276 SMU72_Discrete_Ulv Ulv;
|
| smu73_discrete.h | 260 SMU73_Discrete_Ulv Ulv;
|
| smu74_discrete.h | 292 SMU74_Discrete_Ulv Ulv;
|
| smu75_discrete.h | 298 SMU75_Discrete_Ulv Ulv;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| smu7_discrete.h | 333 SMU7_Discrete_Ulv Ulv;
|
| radeon_ci_dpm.c | 3114 struct ci_ulv_parm *ulv = &pi->ulv; local in function:ci_enable_ulv
3116 if (ulv->supported) {
3138 pi->ulv.supported = false;
3564 struct ci_ulv_parm *ulv = &pi->ulv; local in function:ci_init_smc_table
3587 if (ulv->supported) {
3588 ret = ci_populate_ulv_state(rdev, &pi->smc_state_table.Ulv);
3591 WREG32_SMC(CG_ULV_PARAMETER, ulv->cg_ulv_parameter);
5508 pi->ulv.supported = true
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_vegam_smumgr.c | 569 return vegam_populate_ulv_level(hwmgr, &table->Ulv);
1957 "Failed to initialize ULV state!", return result);
2113 table->Ulv.BifSclkDfs =
|
| amdgpu_polaris10_smumgr.c | 768 return polaris10_populate_ulv_level(hwmgr, &table->Ulv);
1858 "Failed to initialize ULV state!", return result);
1998 table->Ulv.BifSclkDfs = PP_HOST_TO_SMC_US((USHORT)(dividers.pll_post_divider));
|
| amdgpu_fiji_smumgr.c | 830 return fiji_populate_ulv_level(hwmgr, &table->Ulv);
1957 "Failed to initialize ULV state!", return result);
|
| amdgpu_ci_smumgr.c | 961 PP_ASSERT_WITH_CODE((0 == result), "can not get ULV voltage value", return result;);
969 /* use minimum voltage if ulv voltage in pptable is bigger than minimum voltage */
976 /* use minimum voltage if ulv voltage in pptable is bigger than minimum voltage */
1973 result = ci_populate_ulv_state(hwmgr, &(table->Ulv));
1975 "Failed to initialize ULV state!", return result);
|
| amdgpu_tonga_smumgr.c | 509 return tonga_populate_ulv_level(hwmgr, &table->Ulv);
2266 "Failed to initialize ULV state !",
|
