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    Searched refs:cpu_to_be32 (Results 1 - 19 of 19) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rv730_dpm.c 113 sclk->sclk_value = cpu_to_be32(engine_clock);
114 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl);
115 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
116 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
117 sclk->vCG_SPLL_SPREAD_SPECTRUM = cpu_to_be32(cg_spll_spread_spectrum);
118 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2);
190 mclk->mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
191 mclk->mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl);
192 mclk->mclk730.mclk_value = cpu_to_be32(memory_clock);
193 mclk->mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl)
    [all...]
radeon_rv740_dpm.c 181 sclk->sclk_value = cpu_to_be32(engine_clock);
182 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl);
183 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
184 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
185 sclk->vCG_SPLL_SPREAD_SPECTRUM = cpu_to_be32(cg_spll_spread_spectrum);
186 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2);
276 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
277 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
278 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
279 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl)
    [all...]
radeon_rv770_dpm.c 294 smc_state->levels[i].aT = cpu_to_be32(a_t);
301 cpu_to_be32(a_t);
314 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);
317 cpu_to_be32(pi->psp);
477 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
478 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
479 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
480 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
481 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
482 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl)
    [all...]
radeon_cypress_dpm.c 603 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
604 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
605 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
606 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
607 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
608 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
609 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);
610 mclk->mclk770.vMPLL_SS = cpu_to_be32(mpll_ss1);
611 mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2);
827 data->value[i] = cpu_to_be32(entry->mc_data[j])
    [all...]
radeon_ni_dpm.c 1271 table->lowSMIO[i] |= cpu_to_be32(voltage_table->entries[i].smio_low);
1286 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low);
1301 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low);
1489 cpu_to_be32(ni_scale_power_for_smc(tdp_limit, scaling_factor));
1491 cpu_to_be32(ni_scale_power_for_smc(near_tdp_limit, scaling_factor));
1493 cpu_to_be32(ni_scale_power_for_smc((near_tdp_limit * NISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100,
1496 cpu_to_be32(ni_scale_power_for_smc(power_boost_limit, scaling_factor));
1635 arb_regs->mc_arb_dram_timing = cpu_to_be32(dram_timing);
1636 arb_regs->mc_arb_dram_timing2 = cpu_to_be32(dram_timing2);
1697 cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl)
    [all...]
radeon_ci_dpm.c 465 dpm_table->BAPM_TEMP_GRADIENT = cpu_to_be32(pt_defaults->bapm_temp_gradient);
1016 fan_table.RefreshPeriod = cpu_to_be32((rdev->pm.dpm.fan.cycle_delay *
1329 low_sclk_interrupt_t = cpu_to_be32(pi->low_sclk_interrupt_t);
2242 table->VddcLevelCount = cpu_to_be32(table->VddcLevelCount);
2265 table->VddciLevelCount = cpu_to_be32(table->VddciLevelCount);
2288 table->MvddLevelCount = cpu_to_be32(table->MvddLevelCount);
2545 arb_regs->McArbDramTiming = cpu_to_be32(dram_timing);
2546 arb_regs->McArbDramTiming2 = cpu_to_be32(dram_timing2);
2645 table->LinkLevel[i].DownT = cpu_to_be32(5);
2646 table->LinkLevel[i].UpT = cpu_to_be32(30)
    [all...]
radeon_si_dpm.c 2190 cpu_to_be32(si_scale_power_for_smc(tdp_limit, scaling_factor) * 1000);
2192 cpu_to_be32(si_scale_power_for_smc(near_tdp_limit, scaling_factor) * 1000);
2194 cpu_to_be32(si_scale_power_for_smc((near_tdp_limit * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000);
2208 papm_parm->NearTDPLimitTherm = cpu_to_be32(ppm->dgpu_tdp);
2209 papm_parm->dGPU_T_Limit = cpu_to_be32(ppm->tj_max);
2210 papm_parm->dGPU_T_Warning = cpu_to_be32(95);
2211 papm_parm->dGPU_T_Hysteresis = cpu_to_be32(5);
2240 cpu_to_be32(si_scale_power_for_smc(rdev->pm.dpm.near_tdp_limit_adjusted, scaling_factor) * 1000);
2242 cpu_to_be32(si_scale_power_for_smc((rdev->pm.dpm.near_tdp_limit_adjusted * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000);
2436 smc_state->levels[i].SQPowerThrottle = cpu_to_be32(sq_power_throttle)
    [all...]
radeon_kv_dpm.c 552 pi->graphics_level[index].SclkFrequency = cpu_to_be32(sclk);
627 cpu_to_be32(kv_convert_2bit_index_to_voltage(rdev, vid));
709 low_sclk_interrupt_t = cpu_to_be32(pi->low_sclk_interrupt_t);
841 pi->uvd_level[i].VclkFrequency = cpu_to_be32(table->entries[i].vclk);
842 pi->uvd_level[i].DclkFrequency = cpu_to_be32(table->entries[i].dclk);
912 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk);
975 pi->samu_level[i].Frequency = cpu_to_be32(table->entries[i].clk);
1037 pi->acp_level[i].Frequency = cpu_to_be32(table->entries[i].clk);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
pp_endian.h 29 #define PP_HOST_TO_SMC_UL(X) cpu_to_be32(X)
  /src/sys/external/bsd/common/include/asm/
byteorder.h 49 #define cpu_to_be32 htobe32 macro
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si_dpm.c 2281 cpu_to_be32(si_scale_power_for_smc(tdp_limit, scaling_factor) * 1000);
2283 cpu_to_be32(si_scale_power_for_smc(near_tdp_limit, scaling_factor) * 1000);
2285 cpu_to_be32(si_scale_power_for_smc((near_tdp_limit * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000);
2299 papm_parm->NearTDPLimitTherm = cpu_to_be32(ppm->dgpu_tdp);
2300 papm_parm->dGPU_T_Limit = cpu_to_be32(ppm->tj_max);
2301 papm_parm->dGPU_T_Warning = cpu_to_be32(95);
2302 papm_parm->dGPU_T_Hysteresis = cpu_to_be32(5);
2331 cpu_to_be32(si_scale_power_for_smc(adev->pm.dpm.near_tdp_limit_adjusted, scaling_factor) * 1000);
2333 cpu_to_be32(si_scale_power_for_smc((adev->pm.dpm.near_tdp_limit_adjusted * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000);
2533 smc_state->levels[i].SQPowerThrottle = cpu_to_be32(sq_power_throttle)
    [all...]
amdgpu_kv_dpm.c 679 pi->graphics_level[index].SclkFrequency = cpu_to_be32(sclk);
708 cpu_to_be32(kv_convert_2bit_index_to_voltage(adev, vid));
792 low_sclk_interrupt_t = cpu_to_be32(pi->low_sclk_interrupt_t);
924 pi->uvd_level[i].VclkFrequency = cpu_to_be32(table->entries[i].vclk);
925 pi->uvd_level[i].DclkFrequency = cpu_to_be32(table->entries[i].dclk);
995 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk);
1058 pi->samu_level[i].Frequency = cpu_to_be32(table->entries[i].clk);
1120 pi->acp_level[i].Frequency = cpu_to_be32(table->entries[i].clk);
  /src/sys/dev/pci/cxgb/
cxgb_osdep.h 277 #define cpu_to_be32 htobe32 macro
cxgb_t3_hw.c 2929 t3_write_reg(adap, A_TP_EMBED_OP_FIELD5, cpu_to_be32(*buf++));
2930 t3_write_reg(adap, A_TP_EMBED_OP_FIELD4, cpu_to_be32(*buf++));
2931 t3_write_reg(adap, A_TP_EMBED_OP_FIELD3, cpu_to_be32(*buf++));
2932 t3_write_reg(adap, A_TP_EMBED_OP_FIELD2, cpu_to_be32(*buf++));
2933 t3_write_reg(adap, A_TP_EMBED_OP_FIELD1, cpu_to_be32(*buf++));
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_fiji_smumgr.c 2209 fan_table.RefreshPeriod = cpu_to_be32((hwmgr->
amdgpu_iceland_smumgr.c 2154 fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);
amdgpu_ci_smumgr.c 2192 fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);
amdgpu_polaris10_smumgr.c 2147 fan_table.RefreshPeriod = cpu_to_be32((hwmgr->
amdgpu_tonga_smumgr.c 2539 fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);

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