HomeSort by: relevance | last modified time | path
    Searched refs:dpm2 (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
nislands_smc.h 124 PP_NIslands_Dpm2PerfLevel dpm2; member in struct:NISLANDS_SMC_HW_PERFORMANCE_LEVEL
radeon_ni_dpm.c 1782 table->initialState.levels[0].dpm2.MaxPS = 0;
1783 table->initialState.levels[0].dpm2.NearTDPDec = 0;
1784 table->initialState.levels[0].dpm2.AboveSafeInc = 0;
1785 table->initialState.levels[0].dpm2.BelowSafeInc = 0;
1930 table->ACPIState.levels[0].dpm2.MaxPS = 0;
1931 table->ACPIState.levels[0].dpm2.NearTDPDec = 0;
1932 table->ACPIState.levels[0].dpm2.AboveSafeInc = 0;
1933 table->ACPIState.levels[0].dpm2.BelowSafeInc = 0;
2499 smc_state->levels[0].dpm2.MaxPS = 0;
2500 smc_state->levels[0].dpm2.NearTDPDec = 0
    [all...]
sislands_smc.h 171 PP_SIslands_Dpm2PerfLevel dpm2; member in struct:SISLANDS_SMC_HW_PERFORMANCE_LEVEL
radeon_si_dpm.c 2322 smc_state->levels[0].dpm2.MaxPS = 0;
2323 smc_state->levels[0].dpm2.NearTDPDec = 0;
2324 smc_state->levels[0].dpm2.AboveSafeInc = 0;
2325 smc_state->levels[0].dpm2.BelowSafeInc = 0;
2326 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0;
2376 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk);
2377 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC;
2378 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC;
2379 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC;
2380 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sislands_smc.h 171 PP_SIslands_Dpm2PerfLevel dpm2; member in struct:SISLANDS_SMC_HW_PERFORMANCE_LEVEL
amdgpu_si_dpm.c 2420 smc_state->levels[0].dpm2.MaxPS = 0;
2421 smc_state->levels[0].dpm2.NearTDPDec = 0;
2422 smc_state->levels[0].dpm2.AboveSafeInc = 0;
2423 smc_state->levels[0].dpm2.BelowSafeInc = 0;
2424 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0;
2473 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk);
2474 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC;
2475 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC;
2476 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC;
2477 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio)
    [all...]
si_dpm.h 775 PP_NIslands_Dpm2PerfLevel dpm2; member in struct:NISLANDS_SMC_HW_PERFORMANCE_LEVEL

Completed in 149 milliseconds