| /src/sys/external/bsd/dwc2/dist/ |
| dwc2_coreintr.c | 69 static const char *dwc2_op_state_str(struct dwc2_hsotg *hsotg)
71 switch (hsotg->op_state) {
93 * @hsotg: Programming view of DWC_otg controller
95 static void dwc2_handle_usb_port_intr(struct dwc2_hsotg *hsotg)
97 u32 hprt0 = DWC2_READ_4(hsotg, HPRT0);
101 DWC2_WRITE_4(hsotg, HPRT0, hprt0);
108 * @hsotg: Programming view of DWC_otg controller
110 static void dwc2_handle_mode_mismatch_intr(struct dwc2_hsotg *hsotg)
113 DWC2_WRITE_4(hsotg, GINTSTS, GINTSTS_MODEMIS);
115 dev_warn(hsotg->dev, "Mode Mismatch Interrupt: currently in %s mode\n"
540 struct dwc2_hsotg *hsotg = dev; local in function:dwc2_handle_common_intr
[all...] |
| dwc2_hcd.c | 71 * @hsotg: Programming view of DWC_otg controller
80 static void dwc2_dump_channel_info(struct dwc2_hsotg *hsotg,
83 int num_channels = hsotg->core_params->host_channels;
94 hcchar = DWC2_READ_4(hsotg, HCCHAR(chan->hc_num));
95 hcsplt = DWC2_READ_4(hsotg, HCSPLT(chan->hc_num));
96 hctsiz = DWC2_READ_4(hsotg, HCTSIZ(chan->hc_num));
97 hc_dma = DWC2_READ_4(hsotg, HCDMA(chan->hc_num));
99 dev_dbg(hsotg->dev, " Assigned to channel %p:\n", chan);
100 dev_dbg(hsotg->dev, " hcchar 0x%08x, hcsplt 0x%08x\n",
102 dev_dbg(hsotg->dev, " hctsiz 0x%08x, hc_dma 0x%08x\n"
1375 struct dwc2_hsotg *hsotg = container_of(work, struct dwc2_hsotg, local in function:dwc2_conn_id_status_change
1436 struct dwc2_hsotg *hsotg = (struct dwc2_hsotg *)data; local in function:dwc2_wakeup_detected
2148 struct dwc2_hsotg *hsotg; member in struct:wrapper_priv_data
2172 struct dwc2_hsotg *hsotg = container_of(work, struct dwc2_hsotg, local in function:dwc2_hcd_start_func
2184 struct dwc2_hsotg *hsotg = container_of(work, struct dwc2_hsotg, local in function:dwc2_hcd_reset_func
[all...] |
| dwc2_hcdintr.c | 74 static void dwc2_track_missed_sofs(struct dwc2_hsotg *hsotg)
77 u16 curr_frame_number = hsotg->frame_number;
79 if (hsotg->frame_num_idx < FRAME_NUM_ARRAY_SIZE) {
80 if (((hsotg->last_frame_num + 1) & HFNUM_MAX_FRNUM) !=
82 hsotg->frame_num_array[hsotg->frame_num_idx] =
84 hsotg->last_frame_num_array[hsotg->frame_num_idx] =
85 hsotg->last_frame_num;
86 hsotg->frame_num_idx++
[all...] |
| dwc2_core.c | 75 * @hsotg: Programming view of the DWC_otg controller
77 static int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
82 dev_dbg(hsotg->dev, "%s\n", __func__);
85 hr = &hsotg->hr_backup;
86 hr->hcfg = DWC2_READ_4(hsotg, HCFG);
87 hr->haintmsk = DWC2_READ_4(hsotg, HAINTMSK);
88 for (i = 0; i < hsotg->core_params->host_channels; ++i)
89 hr->hcintmsk[i] = DWC2_READ_4(hsotg, HCINTMSK(i));
91 hr->hprt0 = DWC2_READ_4(hsotg, HPRT0);
92 hr->hfir = DWC2_READ_4(hsotg, HFIR)
[all...] |
| dwc2_hcdqueue.c | 75 * @hsotg: The HCD state structure for the DWC OTG controller
81 static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
86 dev_vdbg(hsotg->dev, "%s()\n", __func__);
89 qh->hsotg = hsotg;
102 dev_speed = dwc2_host_get_speed(hsotg, urb->priv);
104 dwc2_host_hub_info(hsotg, urb->priv, &hub_addr, &hub_port);
109 dev_vdbg(hsotg->dev,
125 qh->usecs = dwc2_calc_bus_time(hsotg, qh->do_split ?
131 hsotg->frame_number = dwc2_hcd_get_frame_number(hsotg)
628 struct dwc2_hsotg *hsotg = qh->hsotg; local in function:dwc2_wait_timer_fn
[all...] |
| dwc2_core.h | 57 /* dwc2-hsotg declarations */
871 extern int dwc2_core_reset(struct dwc2_hsotg *hsotg);
872 extern int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg);
873 extern void dwc2_core_host_init(struct dwc2_hsotg *hsotg);
874 extern int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg);
875 extern int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore);
877 void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg);
884 extern void dwc2_hc_init(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan);
885 extern void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
887 extern void dwc2_hc_cleanup(struct dwc2_hsotg *hsotg,
[all...] |
| dwc2_hcdddma.c | 97 static int dwc2_desc_list_alloc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
109 err = usb_allocmem(hsotg->hsotg_sc->sc_bus.ub_dmatag,
128 static void dwc2_desc_list_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
140 static int dwc2_frame_list_alloc(struct dwc2_hsotg *hsotg, gfp_t mem_flags)
144 if (hsotg->frame_list)
148 hsotg->frame_list_sz = 4 * FRLISTEN_64_SIZE;
149 hsotg->frame_list = NULL;
150 err = usb_allocmem(hsotg->hsotg_sc->sc_bus.ub_dmatag,
151 hsotg->frame_list_sz, 0, USBMALLOC_COHERENT, &hsotg->frame_list_usbdma)
[all...] |
| dwc2_hcd.h | 225 * @hsotg: The HCD state structure for the DWC OTG controller
279 struct dwc2_hsotg *hsotg; member in struct:dwc2_qh
382 struct dwc2_hsotg *hsotg; member in struct:hc_xfer_info
388 static inline struct usb_hcd *dwc2_hsotg_to_hcd(struct dwc2_hsotg *hsotg)
390 return (struct usb_hcd *)hsotg->priv;
400 static inline void disable_hc_int(struct dwc2_hsotg *hsotg, int chnum, u32 intr)
402 u32 mask = DWC2_READ_4(hsotg, HCINTMSK(chnum));
405 DWC2_WRITE_4(hsotg, HCINTMSK(chnum), mask);
412 static inline u32 dwc2_read_hprt0(struct dwc2_hsotg *hsotg)
414 u32 hprt0 = DWC2_READ_4(hsotg, HPRT0)
[all...] |
| /src/sys/external/bsd/dwc2/ |
| dwc2.c | 164 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw,
170 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw,
323 struct dwc2_hsotg *hsotg = sc->sc_hsotg; local in function:dwc2_softintr
336 mutex_spin_enter(&hsotg->lock);
354 mutex_spin_exit(&hsotg->lock);
437 struct dwc2_hsotg *hsotg = sc->sc_hsotg; local in function:dwc2_poll
439 mutex_spin_enter(&hsotg->lock);
441 mutex_spin_exit(&hsotg->lock);
464 struct dwc2_hsotg *hsotg = sc->sc_hsotg; local in function:dwc2_abortx
478 mutex_spin_enter(&hsotg->lock)
894 struct dwc2_hsotg *hsotg = sc->sc_hsotg; local in function:dwc2_device_start
1138 struct dwc2_hsotg *hsotg; local in function:dwc2_intr
1276 struct dwc2_hsotg *hsotg = sc->sc_hsotg; local in function:dwc2_init
[all...] |
| dwc2.h | 67 #define DWC2_READ_4(hsotg, reg) \
68 bus_space_read_4((hsotg)->hsotg_sc->sc_iot, (hsotg)->hsotg_sc->sc_ioh, (reg))
69 #define DWC2_WRITE_4(hsotg, reg, data) \
70 bus_space_write_4((hsotg)->hsotg_sc->sc_iot, (hsotg)->hsotg_sc->sc_ioh, (reg), (data));
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| exynos4412-odroidx.dts | 106 &hsotg {
|
| exynos4412-odroidu3.dts | 129 &hsotg {
|
| s5pv210-smdkv210.dts | 190 &hsotg {
|
| s5pv210.dtsi | 408 hsotg: hsotg@ec000000 { label
409 compatible = "samsung,s3c6400-hsotg";
|
| exynos4412-itop-elite.dts | 165 &hsotg {
|
| exynos3250.dtsi | 367 hsotg: hsotg@12480000 { label
368 compatible = "samsung,s3c6400-hsotg";
|
| exynos4.dtsi | 365 hsotg: hsotg@12480000 { label
366 compatible = "samsung,s3c6400-hsotg";
|
| exynos4210-origen.dts | 160 &hsotg {
|
| exynos4412-itop-scp-core.dtsi | 123 &hsotg {
|
| s5pv210-aquila.dts | 361 &hsotg {
|
| s5pv210-goni.dts | 339 &hsotg {
|
| exynos4210-trats.dts | 251 &hsotg {
|
| exynos4210-universal_c210.dts | 291 &hsotg {
|
| exynos4412-odroid-common.dtsi | 258 &hsotg {
|
| exynos3250-monk.dts | 185 &hsotg {
|
