| /src/sys/arch/arm/s3c2xx0/ |
| s3c2800_intr.h | 51 #define get_pending_softint() (softint_pending & intr_mask)
56 (*s3c2xx0_intr_mask_reg = intr_mask & global_intr_mask)
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| s3c24x0_intr.h | 40 /* no room for softinterrupts in intr_mask. */
50 (*s3c2xx0_intr_mask_reg = ~(intr_mask & global_intr_mask))
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| s3c2xx0_intr.h | 88 extern volatile int intr_mask;
120 intr_mask = s3c2xx0_imask[curcpl()];
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| s3c2800_intr.c | 60 volatile int intr_mask; /* XXX: does this need to be volatile? */ variable in typeref:typename:volatile int
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/mc/ |
| nouveau_nvkm_subdev_mc_gk20a.c | 37 .intr_mask = gf100_mc_intr_mask,
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| nouveau_nvkm_subdev_mc_gp10b.c | 45 .intr_mask = gp100_mc_intr_mask,
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| nouveau_nvkm_subdev_mc_gk104.c | 61 .intr_mask = gf100_mc_intr_mask,
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| nouveau_nvkm_subdev_mc_tu102.c | 50 .intr_mask = gp100_mc_intr_mask,
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| nouveau_nvkm_subdev_mc_gt215.c | 73 .intr_mask = gt215_mc_intr_mask,
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| priv.h | 29 void (*intr_mask)(struct nvkm_mc *, u32 mask, u32 stat); member in struct:nvkm_mc_func
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| nouveau_nvkm_subdev_mc_gf100.c | 113 .intr_mask = gf100_mc_intr_mask,
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| nouveau_nvkm_subdev_mc_gp100.c | 115 .intr_mask = gp100_mc_intr_mask,
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| nouveau_nvkm_subdev_mc_base.c | 47 if (likely(mc) && mc->func->intr_mask) {
53 mc->func->intr_mask(mc, mask, en ? mask : 0);
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| /src/sys/arch/arm/xscale/ |
| pxa2x0_intr.h | 59 extern volatile int intr_mask;
71 intr_mask = pxa2x0_imask[new];
72 write_icu(SAIPIC_MR, intr_mask);
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| pxa2x0_intr.c | 96 volatile int intr_mask; variable in typeref:typename:volatile int
300 intr_mask = pxa2x0_imask[curcpu()->ci_cpl];
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/gpio/ |
| priv.h | 21 void (*intr_mask)(struct nvkm_gpio *, u32, u32, u32); member in struct:nvkm_gpio_func
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| nouveau_nvkm_subdev_gpio_g94.c | 69 .intr_mask = g94_gpio_intr_mask,
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| nouveau_nvkm_subdev_gpio_gf119.c | 81 .intr_mask = g94_gpio_intr_mask,
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| nouveau_nvkm_subdev_gpio_gk104.c | 69 .intr_mask = gk104_gpio_intr_mask,
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| nouveau_nvkm_subdev_gpio_base.c | 121 gpio->func->intr_mask(gpio, type, 1 << index, 0);
128 gpio->func->intr_mask(gpio, type, 1 << index, 1 << index);
175 gpio->func->intr_mask(gpio, NVKM_GPIO_TOGGLED, mask, 0);
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| nouveau_nvkm_subdev_gpio_nv10.c | 114 .intr_mask = nv10_gpio_intr_mask,
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| /src/sys/dev/isa/ |
| i82365_isasubr.c | 185 device_xname(sc->dev), h->chip, sc->intr_mask[h->chip]);
210 if ((sc->intr_mask[h->chip] & (1 << i)) == 0)
258 sc->intr_mask[h->chip] = mask;
260 printf("%s\n", sc->intr_mask[h->chip] ? "" : " none");
290 sc->intr_mask[h->chip] =
298 chipmask &= sc->intr_mask[h->chip];
306 if ((sc->intr_mask[i / 2] & ~chipmask) == 0) {
473 if (isa_intr_alloc(ic, sc->intr_mask[h->chip], ist, &irq))
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| /src/sys/external/bsd/dwc2/dist/ |
| dwc2_hcdqueue.c | 666 u32 intr_mask; local in function:dwc2_hcd_qh_add
704 intr_mask = DWC2_READ_4(hsotg, GINTMSK);
705 intr_mask |= GINTSTS_SOF;
706 DWC2_WRITE_4(hsotg, GINTMSK, intr_mask);
722 u32 intr_mask; local in function:dwc2_hcd_qh_unlink
744 intr_mask = DWC2_READ_4(hsotg, GINTMSK);
745 intr_mask &= ~GINTSTS_SOF;
746 DWC2_WRITE_4(hsotg, GINTMSK, intr_mask);
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| /src/sys/arch/x86/include/ |
| intr.h | 106 * is because intr_mask() can be called from an interrupt handler.
219 void intr_mask(struct intrhand *);
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| /src/sys/arch/arm/pic/ |
| picvar.h | 94 void intr_mask(void *);
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