/src/sys/arch/amiga/amiga/ |
isr.h | 1 /* $NetBSD: isr.h,v 1.13 2009/05/19 18:39:26 phx Exp $ */ 31 * @(#)isr.h 7.1 (Berkeley) 5/8/90 37 struct isr { struct 38 struct isr *isr_forw; 39 struct isr *isr_back; 49 void add_isr(struct isr *); 50 void remove_isr(struct isr *);
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/src/sys/arch/amiga/clockport/ |
clockport_common.c | 51 clockport_generic_intr_establish(int (*isr)(void *), void *arg) 53 struct isr *sc_isr; 55 sc_isr = kmem_alloc(sizeof(struct isr), KM_SLEEP); 57 sc_isr->isr_intr = isr;
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/src/sys/arch/amiga/dev/ |
if_levar.h | 55 struct isr sc_isr;
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bzivscvar.h | 31 struct isr sc_isr; /* Interrupt chain struct */
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bzscvar.h | 31 struct isr sc_isr; /* Interrupt chain struct */
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bztzscvar.h | 31 struct isr sc_isr; /* Interrupt chain struct */
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cbiiscvar.h | 31 struct isr sc_isr; /* Interrupt chain struct */
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efavar.h | 59 struct isr sc_isr;
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cbscvar.h | 31 struct isr sc_isr; /* Interrupt chain struct */
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flscvar.h | 31 struct isr sc_isr; /* Interrupt chain struct */
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/src/sys/external/isc/atheros_hal/dist/ar5210/ |
ar5210_interrupts.c | 38 * an abstracted bitmask of the data found in the ISR. 39 * Note that reading the ISR clear pending interrupts. 47 uint32_t isr; local in function:ar5210GetPendingInterrupts 49 isr = OS_REG_READ(ah, AR_ISR); 50 if (isr == 0xffffffff) { 62 *masked = (isr & (HAL_INT_COMMON - HAL_INT_BNR)) & ahp->ah_maskReg; 64 if (isr & AR_FATAL_INT) 66 if (isr & (AR_ISR_RXOK_INT | AR_ISR_RXERR_INT)) 68 if (isr & (AR_ISR_TXOK_INT | AR_ISR_TXDESC_INT | AR_ISR_TXERR_INT | AR_ISR_TXEOL_INT)) 72 * On fatal errors collect ISR state for debugging [all...] |
/src/sys/external/isc/atheros_hal/dist/ar5211/ |
ar5211_interrupts.c | 41 * the interrupt line, and returns both the masked and unmasked mapped ISR 51 uint32_t isr; local in function:ar5211GetPendingInterrupts 53 isr = OS_REG_READ(ah, AR_ISR_RAC); 54 if (isr == 0xffffffff) { 59 *masked = isr & HAL_INT_COMMON; 61 if (isr & AR_ISR_HIUERR) 63 if (isr & (AR_ISR_RXOK | AR_ISR_RXERR)) 65 if (isr & (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR | AR_ISR_TXEOL)) 72 if ((isr & AR_ISR_RXORN) && AH_PRIVATE(ah)->ah_rxornIsFatal) { 79 * On fatal errors collect ISR state for debugging [all...] |
/src/sys/external/isc/atheros_hal/dist/ar5416/ |
ar5416_interrupts.c | 36 uint32_t isr; local in function:ar5416IsInterruptPending 38 * Some platforms trigger our ISR before applying power to 41 isr = OS_REG_READ(ah, AR_INTR_ASYNC_CAUSE); 42 if (isr != AR_INTR_SPURIOUS && (isr & AR_INTR_MAC_IRQ) != 0) 45 isr = OS_REG_READ(ah, AR_INTR_SYNC_CAUSE); 46 if (isr != AR_INTR_SPURIOUS && (isr & AR_INTR_SYNC_DEFAULT)) 54 * the interrupt line, and returns both the masked and unmasked mapped ISR 66 uint32_t isr, isr0, isr1, sync_cause local in function:ar5416GetPendingInterrupts [all...] |
/src/sys/external/isc/atheros_hal/dist/ar5212/ |
ar5212_interrupts.c | 39 * Some platforms trigger our ISR before applying power to 47 * the interrupt line, and returns both the masked and unmasked mapped ISR 57 uint32_t isr, isr0, isr1; local in function:ar5212GetPendingInterrupts 61 isr = OS_REG_READ(ah, AR_ISR); 63 if (isr & AR_ISR_BCNMISC) { 77 isr = OS_REG_READ(ah, AR_ISR_RAC); 78 if (isr == 0xffffffff) { 83 *masked = isr & HAL_INT_COMMON; 85 if (isr & AR_ISR_HIUERR) 87 if (isr & (AR_ISR_RXOK | AR_ISR_RXERR) [all...] |
/src/sys/netipsec/ |
ipsec_output.c | 141 ipsec_process_done(struct mbuf *m, const struct ipsecrequest *isr, 157 KASSERT(isr != NULL); 253 if (isr->next) { 258 return ipsec4_process_packet(m, isr->next, NULL); 262 return ipsec6_process_packet(m, isr->next, flags); 363 ipsec_lookup_sa(const struct ipsecrequest *isr, const struct mbuf *m) 367 saidx = isr->saidx; 368 if (isr->saidx.mode == IPSEC_MODE_TRANSPORT) { 370 ipsec_fill_saidx_bymbuf(&saidx, m, isr->saidx.dst.sa.sa_family); 378 * - isr == NULL and error != 0 => something is bad : the packet must b [all...] |
/src/sys/arch/amigappc/include/ |
intr.h | 36 #include <amiga/amiga/isr.h>
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/src/sys/arch/amigappc/amigappc/ |
machdep.c | 59 #include <amiga/amiga/isr.h> 93 struct isr *isr_ports; 94 struct isr *isr_exter; 99 add_isr(struct isr *isr) 101 struct isr **p, *q; 103 p = isr->isr_ipl == 2 ? &isr_ports : &isr_exter; 107 isr->isr_forw = NULL; 108 *p = isr; 111 custom.intena = isr->isr_ipl == 2 [all...] |
/src/sys/arch/mvme68k/dev/ |
pccvar.h | 36 #include <mvme68k/mvme68k/isr.h>
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/src/sys/arch/arm/xscale/ |
iopi2c.c | 85 uint32_t isr; local in function:iopiic_wait 92 * the ISR while the transfer is in progress--at least on the 106 isr = bus_space_read_4(sc->sc_st, sc->sc_sh, IIC_ISR); 107 if (isr & (bit | IIC_ISR_BED)) 112 if (isr & (IIC_ISR_BED | (bit & IIC_ISR_ALD))) 114 else if (isr & (bit & ~IIC_ISR_ALD)) 121 "iopiic_wait, (%08x) error %d: ISR = 0x%08x\n", 122 bit, error, isr); 126 * read-only. So simply write back our copy of the ISR to clear any 129 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ISR, isr); [all...] |
/src/sys/arch/amiga/pci/ |
pci_machdep.c | 78 struct isr* pci_isr; 79 pci_isr = kmem_zalloc(sizeof(struct isr), KM_SLEEP); 94 kmem_free(cookie, sizeof(struct isr));
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/src/sys/arch/arm/sunxi/ |
sun6i_spi.c | 110 uint32_t gcr, isr; local in function:sun6ispi_attach 144 isr = SPIREG_READ(sc, SPI_INT_STA); 145 SPIREG_WRITE(sc, SPI_INT_STA, isr); 271 uint32_t isr, tcr; local in function:sun6ispi_start 284 isr = SPIREG_READ(sc, SPI_INT_STA); 285 SPIREG_WRITE(sc, SPI_INT_STA, isr); 372 uint32_t isr; local in function:sun6ispi_intr 374 isr = SPIREG_READ(sc, SPI_INT_STA); 375 SPIREG_WRITE(sc, SPI_INT_STA, isr); 377 if (ISSET(isr, SPI_ISR_RX_RDY)) [all...] |
/src/sys/arch/mips/atheros/ |
ar_intr.c | 198 uint32_t isr; local in function:genath_misc_intr 203 isr = misc_intstat_get(); 206 misc_intstat_put(isr & ~mask); 208 isr &= mask; 209 while (isr != 0) { 211 int index = 31 - __builtin_clz(isr & -isr); /* ffs */ 218 isr >>= index + 1;
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/src/sys/arch/arm/at91/ |
at91twi.c | 146 u_int sr, isr, imr; local in function:at91twi_intr 150 isr = sr & imr; 152 if (!isr) { 159 if (isr & TWI_SR_TXCOMP) { 183 if (isr & TWI_SR_TXRDY) { 188 if (isr & TWI_SR_RXRDY) { 194 if (isr & (TWI_SR_TXRDY | TWI_SR_RXRDY) && sc->sc_resid <= 0) {
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/src/sys/dev/ic/ |
am7990.c | 368 uint16_t isr; local in function:am7990_intr 370 isr = (*sc->sc_rdcsr)(sc, LE_CSR0) | sc->sc_saved_csr0; 374 printf("%s: am7990_intr entering with isr=%04x\n", 375 device_xname(sc->sc_dev), isr); 377 if ((isr & LE_C0_INTR) == 0) 385 isr &= ~LE_C0_INEA; 386 (*sc->sc_wrcsr)(sc, LE_CSR0, isr); 390 isr & (LE_C0_INEA | LE_C0_BABL | LE_C0_MISS | LE_C0_MERR | 393 if (isr & LE_C0_ERR) { 394 if (isr & LE_C0_BABL) [all...] |
/src/sys/arch/amiga/include/ |
intr.h | 41 #include <amiga/amiga/isr.h>
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