| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_jpeg.c | 44 INIT_DELAYED_WORK(&adev->jpeg.idle_work, amdgpu_jpeg_idle_work_handler);
53 cancel_delayed_work_sync(&adev->jpeg.idle_work);
55 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
56 if (adev->jpeg.harvest_config & (1 << i))
59 amdgpu_ring_fini(&adev->jpeg.inst[i].ring_dec);
67 cancel_delayed_work_sync(&adev->jpeg.idle_work);
80 container_of(work, struct amdgpu_device, jpeg.idle_work.work);
84 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
85 if (adev->jpeg.harvest_config & (1 << i))
88 fences += amdgpu_fence_count_emitted(&adev->jpeg.inst[i].ring_dec)
[all...] |
| amdgpu_jpeg_v2_5.c | 67 adev->jpeg.num_jpeg_inst = JPEG25_MAX_HW_INSTANCES_ARCTURUS;
68 for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) {
69 harvest = RREG32_SOC15(JPEG, i, mmCC_UVD_HARVESTING);
71 adev->jpeg.harvest_config |= 1 << i;
74 if (adev->jpeg.harvest_config == (AMDGPU_JPEG_HARVEST_JPEG0 |
78 adev->jpeg.num_jpeg_inst = 1;
87 * jpeg_v2_5_sw_init - sw init for JPEG block
99 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
100 if (adev->jpeg.harvest_config & (1 << i))
103 /* JPEG TRAP *
[all...] |
| amdgpu_jpeg_v2_0.c | 75 adev->jpeg.num_jpeg_inst = 1;
84 * jpeg_v2_0_sw_init - sw init for JPEG block
96 /* JPEG TRAP */
98 VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq);
110 ring = &adev->jpeg.inst->ring_dec;
114 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, 0);
118 adev->jpeg.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;
119 adev->jpeg.inst->external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH);
125 * jpeg_v2_0_sw_fini - sw fini for JPEG bloc
[all...] |
| amdgpu_jpeg_v1_0.c | 44 ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0);
63 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW);
69 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH);
81 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_CNTL);
87 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA);
93 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_CNTL);
98 ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_COND_RD_TIMER), 0, 0, PACKETJ_TYPE0);
100 ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0);
102 ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0);
120 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_RPTR)
[all...] |
| amdgpu_ctx.c | 125 scheds = adev->jpeg.jpeg_sched;
126 num_scheds = adev->jpeg.num_jpeg_sched;
676 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
677 if (adev->jpeg.harvest_config & (1 << i))
679 adev->jpeg.jpeg_sched[adev->jpeg.num_jpeg_sched++] =
680 &adev->jpeg.inst[i].ring_dec.sched;
|
| amdgpu_vcn_v1_0.c | 214 ring = &adev->jpeg.inst->ring_dec;
448 /* JPEG disable CGC */
575 /* enable JPEG CGC */
640 /* disable JPEG CGC */
1220 adev->vcn.inst[inst_idx].pause_state.jpeg,
1221 new_state->fw_based, new_state->jpeg);
1235 /* pause DPG non-jpeg */
1265 /* unpause dpg non-jpeg, no need to wait */
1273 if (adev->vcn.inst[inst_idx].pause_state.jpeg != new_state->jpeg) {
[all...] |
| amdgpu_vcn.h | 157 enum internal_dpg_state jpeg; member in struct:dpg_pause_state
|
| amdgpu_kms.c | 418 for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) {
419 if (adev->jpeg.harvest_config & (1 << i))
422 if (adev->jpeg.inst[i].ring_dec.sched.ready)
|
| amdgpu.h | 915 /* jpeg */
916 struct amdgpu_jpeg jpeg; member in struct:amdgpu_device
|
| /src/sys/dev/stbi/ |
| stb_image.c | 1 /* stbi-1.29 - public domain JPEG/PNG reader - http://nothings.org/stb_image.c
9 JPEG baseline (no JPEG progressive)
31 minor perf improvements for jpeg
55 Sean Barrett (jpeg, png, bmp) Fabian "ryg" Giesen
86 // - no jpeg progressive support
87 // - non-HDR formats support 8-bit samples only (jpeg, png)
88 // - no delayed line count (jpeg) -- IJG doesn't support either
314 // is it a jpeg?
502 // is it a jpeg
1159 } jpeg; typedef in typeref:struct:__anon26c9e3660608
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| exynos5420.dtsi | 816 jpeg_0: jpeg@11f50000 {
817 compatible = "samsung,exynos5420-jpeg";
820 clock-names = "jpeg";
825 jpeg_1: jpeg@11f60000 {
826 compatible = "samsung,exynos5420-jpeg";
829 clock-names = "jpeg";
1150 bus_jpeg: bus-jpeg {
1157 bus_jpeg_apb: bus-jpeg-apb {
|
| s5pv210.dtsi | 639 jpeg_codec: jpeg-codec@fb600000 {
640 compatible = "samsung,s5pv210-jpeg";
645 clock-names = "jpeg";
|
| exynos3250.dtsi | 303 jpeg: codec@11830000 { label
304 compatible = "samsung,exynos3250-jpeg";
308 clock-names = "jpeg", "sclk";
|
| exynos4.dtsi | 727 jpeg_codec: jpeg-codec@11840000 {
728 compatible = "samsung,exynos4210-jpeg";
732 clock-names = "jpeg";
|
| exynos4412.dtsi | 780 compatible = "samsung,exynos4212-jpeg";
|
| exynos3250-rinato.dts | 613 &jpeg {
|
| r8a7792.dtsi | 842 jpu: jpeg-codec@fe980000 {
|
| imx6qdl.dtsi | 495 interrupt-names = "bit", "jpeg";
|
| r8a7790.dtsi | 1711 jpu: jpeg-codec@fe980000 {
|
| r8a7791.dtsi | 1752 jpu: jpeg-codec@fe980000 {
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/exynos/ |
| exynos5433.dtsi | 1259 jpeg: codec@15020000 { label
1260 compatible = "samsung,exynos5433-jpeg";
|
