/src/lib/libc/compat/arch/sparc64/sys/ |
compat___sigtramp1.S | 103 rd %fprs, %l0 104 btst FPRS_DL|FPRS_DU, %l0 /* All clean? */ 106 btst FPRS_DL, %l0 /* test dl */ 108 btst FPRS_DU, %l0 /* test du */ 112 add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 /* Generate a pointer so */ 113 andn %l0, BLOCK_ALIGN, %l0 /* we can do a block store */ 114 stda %f0, [%l0] ASI_BLK_P 115 inc BLOCK_SIZE, %l0 116 stda %f16, [%l0] ASI_BLK_ [all...] |
/src/libexec/ld.elf_so/arch/sparc64/ |
rtld_start.S | 71 ldx [%l7], %l0 /* base-relative &_DYNAMIC */ 76 sub %o0, %l0, %l0 /* relocbase */ 78 mov %l0, %o1 /* relocbase */ 80 mov %l0, %o1 /* relocbase */ 130 sub %o1, %o0, %l0 /* i = x - y */ 132 sub %l0, %l1, %l0 /* i = x - y + 8 - 32768*32 */ 137 sdivx %l0, %l1, %l1 /* Calculate i/5120 */ 141 sub %l0, %l2, %l2 /* And i%5120 * [all...] |
/src/libexec/ld.elf_so/arch/sparc/ |
rtld_start.S | 49 ld [%l7], %l0 /* base-relative &_DYNAMIC */ 53 sub %o0, %l0, %l0 /* relocbase */ 55 mov %l0, %o1 /* relocbase */ 57 mov %l0, %o1 /* relocbase */
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/src/lib/libc/arch/sparc64/gen/ |
modf.S | 79 * %l0 scratch 92 L0: 105 PICCY_SET(Lmagic, %l0, %o7) 106 ldd [%l0], %f2 108 sethi %hi(Lmagic), %l0 109 ldd [%l0 + %lo(Lmagic)], %f2 179 PICCY_SET(L0, %l0, %o7) 181 ldd [%l0], %f0 ! return 0.0; 183 sethi %hi(L0), %l [all...] |
/src/lib/libc/arch/sparc/gen/ |
modf.S | 79 * %l0 scratch 91 L0: 104 andn %i0, %l1, %l0 105 st %l0, [%fp - 16] 107 PICCY_SET(Lmagic, %l0, %o7) 108 ldd [%l0], %f2 110 sethi %hi(Lmagic), %l0 111 ldd [%l0 + %lo(Lmagic)], %f2 188 PICCY_SET(L0, %l0, %o7 [all...] |
/src/sys/crypto/des/ |
des_ecb.c | 127 register DES_LONG l0,l1; local in function:des_ecb3_encrypt 132 c2l(in,l0); 134 ll[0]=l0; 142 l0=ll[0]; 144 l2c(l0,out);
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/src/common/lib/libc/arch/sparc64/string/ |
strmacros.h | 54 add %fp, STKB-FS_SIZE, %l0; /* Allocate a fpstate */\ 56 andn %l0, BLOCK_ALIGN, %l0; /* Align it */ \ 59 add %l0, -STKB-CC64FSZ-(siz), %sp; /* Set proper %sp */ \ 81 STPTR %l0, [%l5 + L_FPSTATE]; /* Insert new fpstate */\ 92 cmp %l7, %l0; \
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memcpy.S | 113 mov %i0, %l0 121 ldub [%l0], %l4 ! Load 1st byte 125 inc 1, %l0 133 btst 1, %l0 135 lduh [%l0], %l4 ! Load short 137 ldub [%l0], %l4 ! Load bytes 139 ldub [%l0+1], %l3 146 inc 2, %l0 154 btst 3, %l0 156 lduw [%l0], %l4 ! Load word - [all...] |
/src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/tests/ |
sanitizer_deadlock_detector_test.cc | 143 uptr l0 = d.newNode(0); local in function:RunRemoveNodeTest 150 // l0=>l1=>l2 151 d.onLock(&dtls, l0); 155 d.onUnlock(&dtls, l0); 166 locks.insert(l0); 180 // l2=>l0 182 EXPECT_TRUE(d.onLock(&dtls, l0)); 184 d.onUnlock(&dtls, l0); 196 // make sure no edges from or to l0,l1,l4,l5 left. 201 // l0 => lt 260 uptr l0 = d.newNode(0); local in function:RunMultipleEpochsTest 302 uptr l0 = d.newNode(0); local in function:RunCorrectEpochFlush 326 uptr l0 = d.newNode(0); local in function:RunTryLockTest 353 uptr l0 = d.newNode(0); local in function:RunOnFirstLockTest 391 uptr l0 = d.newNode(0); local in function:RunRecusriveLockTest 421 uptr l0 = d.newNode(0); local in function:RunLockContextTest [all...] |
/src/sys/arch/sparc/stand/common/ |
srt0.S | 62 sethi %hi(1b), %l0 63 2: or %l0, %lo(1b), %l0 64 cmp %l0, %o7 ! %o7 contains actual address of 1b 71 add %o7, (start-1b), %l0 75 3: ld [%l0], %o0 76 add %l0, 4, %l0 100 rd %psr, %l0 101 wr %l0, PSR_ET, %ps [all...] |
/src/sys/arch/sparc/sparc/ |
sigcode_state.s | 105 ld [%fp + 64 + 16 + SC_PSR_OFFSET], %l0; \ 107 andcc %l0, %l1, %l0; /* %l0 = fpu enable bit */ \ 135 tst %l0; /* reload fpu registers? */ \
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locore.s | 109 ldd [addr], %l0; \ 267 * %l2 respectively. We use two more to read the psr into %l0, and to 297 mov (type), %l3; b label; mov %psr, %l0; nop 301 mov (lev), %l3; b _C_LABEL(sparc_interrupt44c); mov %psr, %l0; nop 305 mov (lev), %l3; b _C_LABEL(sparc_interrupt4m); mov %psr, %l0; nop 310 mov (lev), %l3; mov (bit), %l4; b softintr_sun44c; mov %psr, %l0 333 #define SYSCALL b _C_LABEL(_syscall); mov %psr, %l0; nop; nop 334 #define WINDOW_OF b window_of; mov %psr, %l0; nop; nop 335 #define WINDOW_UF b window_uf; mov %psr, %l0; nop; nop 337 #define ZS_INTERRUPT b zshard; mov %psr, %l0; nop; no [all...] |
bsd_fdintr.s | 139 #define R_fdc %l0 167 std %l0, [%l7] 321 ldd [%l7], %l0 322 mov %l0, %psr
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/src/lib/libc/arch/sparc64/sys/ |
__clone.S | 75 ldx [%sp+CC64FSZ-16+BIAS], %l0 ! grab the function... 76 call %l0 ! Call the clone's entry point.
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/src/sys/arch/sparc64/sparc64/ |
sunos_sigcode.s | 114 ld [%fp + 64 + 16 + SC_PSR_OFFSET], %l0 116 andcc %l0, %l1, %l0 ! %l0 = fpu enable bit 149 tst %l0 ! reload fpu registers?
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sigcode32.s | 115 rd %fprs, %l0 116 btst FPRS_DL, %l0 ! test dl 148 btst FPRS_DL, %l0 ! test dl
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db_tlb_access.S | 65 inc 8, %l0 99 inc 8, %l0 148 inc 8, %l0 190 inc 8, %l0
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bsd_fdintr.s | 50 #define R_fdc %l0 79 std %l0, [%l7] 230 ldd [%l7], %l0 231 mov %l0, %psr
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locore.s | 434 stxa %l0, [%sp+BIAS+0x00]%asi; \ 463 stwa %l0, [%sp+0x00]%asi; \ 501 ldxa [%sp+BIAS+0x00]%asi, %l0; \ 530 lda [%sp+0x00]%asi, %l0; \ 569 set 0xbadcafe, %l0 ! DEBUG -- compiler should not rely on zero-ed registers. 571 clr %l0 575 mov %l0,%l1; mov %l0,%l2 ! Clear out %l0-%l8 and %o0-%o8 and inc %cleanwin and done 576 mov %l0,%l3; mov %l0,%l [all...] |
mp_subr.S | 215 1: rd %pc, %l0 216 LDULNG [%l0 + (3f-1b)], %l1 ! Load itlb slot count 217 LDULNG [%l0 + (7f-1b)], %g2 ! Load cpu_args address. 218 add %l0, (6f-1b), %l2 ! tlb slots 262 LDULNG [%l0 + (4f-1b)], %l1 ! Load dtlb slot count 298 LDULNG [%l0 + (5f-1b)], %l1 ! Load function
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/src/lib/libc/compat/arch/sparc/sys/ |
compat___sigtramp1.S | 97 ld [%fp + 64 + 16 + SC_PSR_OFFSET], %l0; \ 99 andcc %l0, %l1, %l0; /* %l0 = fpu enable bit */ \ 127 tst %l0; /* reload fpu registers? */ \
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/src/sys/arch/aarch64/aarch64/ |
pmapboot.c | 87 pd_entry_t *l0, *l1, *l2, *l3; local in function:pmapboot_protect 101 l0 = (pd_entry_t *)AARCH64_PA_TO_KVA(pa); 105 if (!l0pde_valid(l0[idx])) 107 pa = l0pde_pa(l0[idx]); 220 pd_entry_t *l0, *l1, *l2, *l3, pte; variable in typeref:typename:pd_entry_t * 257 l0 = (pd_entry_t *)(reg_ttbr0_el1_read() & TTBR_BADDR); 262 l0 = (pd_entry_t *)(reg_ttbr1_el1_read() & TTBR_BADDR); 277 if (l0[idx0] == 0) { 286 l0[idx0] = pte; 291 l1 = (uint64_t *)(l0[idx0] & LX_TBL_PA) [all...] |
/src/sys/arch/aarch64/include/ |
asan.h | 119 pd_entry_t *l0, *l1, *l2, *l3; local in function:kasan_md_shadow_map_page 126 l0 = (void *)KERN_PHYSTOV(l0pa); 128 l0 = (void *)AARCH64_PA_TO_KVA(l0pa); 132 pde = l0[idx]; 135 atomic_swap_64(&l0[idx], pa | L0_TABLE);
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/src/sys/arch/sparc/stand/ofwboot/ |
srt0.s | 158 rdpr %pstate, %l0 161 wrpr %l0, %g0, %pstate 176 rdpr %pstate, %l0 189 wrpr %l0, 0, %pstate
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/src/sys/lib/libkern/arch/hppa/ |
milli.S | 1071 l0: add %r29,%r1,%r29 ; add in this partial product label 1089 x3: comb,<> %r25,0,l0 ! sh1add %r26,%r26,%r1 ! bv 0(r31) ! add %r29,%r1,%r29 1093 x5: comb,<> %r25,0,l0 ! sh2add %r26,%r26,%r1 ! bv 0(r31) ! add %r29,%r1,%r29 1097 x7: sh1add %r26,%r26,%r1 ! comb,<> %r25,0,l0 ! sh2add %r26,%r29,%r29 ! b,n ret_t0 1101 x9: comb,<> %r25,0,l0 ! sh3add %r26,%r26,%r1 ! bv 0(r31) ! add %r29,%r1,%r29 1105 x11: sh1add %r26,%r26,%r1 ! comb,<> %r25,0,l0 ! sh3add %r26,%r29,%r29 ! b,n ret_t0 1109 x13: sh2add %r26,%r26,%r1 ! comb,<> %r25,0,l0 ! sh3add %r26,%r29,%r29 ! b,n ret_t0 1113 x15: sh2add %r26,%r26,%r1 ! comb,<> %r25,0,l0 ! sh1add %r1,%r1,%r1 ! b,n ret_t0 1117 x17: sh3add %r26,%r26,%r1 ! comb,<> %r25,0,l0 ! sh3add %r26,%r1,%r1 ! b,n ret_t0 1121 x19: sh3add %r26,%r26,%r1 ! comb,<> %r25,0,l0 ! sh1add %r1,%r26,%r1 ! b,n ret_t [all...] |