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    Searched refs:memory_clock (Results 1 - 25 of 26) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rv740_dpm.c 99 u32 rv740_get_dll_speed(bool is_gddr5, u32 memory_clock)
110 data_rate = (u16)(memory_clock * factor / 1000);
192 u32 engine_clock, u32 memory_clock,
210 memory_clock, false, &dividers);
252 u32 vco_freq = memory_clock * dividers.post_div;
271 memory_clock);
276 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
410 u8 rv740_get_mclk_frequency_ratio(u32 memory_clock)
414 if ((memory_clock < 10000) || (memory_clock > 47500)
    [all...]
rv770_dpm.h 186 u32 engine_clock, u32 memory_clock,
207 u32 engine_clock, u32 memory_clock,
214 u8 rv740_get_mclk_frequency_ratio(u32 memory_clock);
215 u32 rv740_get_dll_speed(bool is_gddr5, u32 memory_clock);
cypress_dpm.h 127 u32 engine_clock, u32 memory_clock);
159 u32 memory_clock, bool strobe_mode);
radeon_cypress_dpm.c 480 u32 engine_clock, u32 memory_clock,
507 memory_clock, strobe_mode, &dividers);
561 u32 vco_freq = memory_clock * dividers.post_div;
580 memory_clock);
603 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
617 u32 memory_clock, bool strobe_mode)
623 if (memory_clock < 10000)
625 else if (memory_clock > 47500)
628 mc_para_index = (u8)((memory_clock - 10000) / 2500);
630 if (memory_clock < 65000
    [all...]
radeon_rv730_dpm.c 124 u32 engine_clock, u32 memory_clock,
140 memory_clock, false, &dividers);
172 u32 vco_freq = memory_clock * post_divider;
192 mclk->mclk730.mclk_value = cpu_to_be32(memory_clock);
radeon_ci_dpm.c 174 extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
175 extern u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode);
2503 const u32 memory_clock,
2515 if ((memory_clock > 100000) && (memory_clock <= 125000)) {
2519 } else if ((memory_clock > 125000) && (memory_clock <= 137500)) {
2795 u32 memory_clock,
2813 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param);
2840 freq_nom = memory_clock * 4 * (1 << mpll_param.post_div)
    [all...]
radeon_rv770_dpm.c 322 static void rv770_calculate_fractional_mpll_feedback_divider(u32 memory_clock,
333 fyclk = (memory_clock * 8) / 2;
335 fyclk = (memory_clock * 4) / 2;
391 u32 engine_clock, u32 memory_clock,
415 memory_clock, false, &dividers);
422 rv770_calculate_fractional_mpll_feedback_divider(memory_clock, reference_clock,
449 rv770_calculate_fractional_mpll_feedback_divider(memory_clock,
477 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
radeon_si_dpm.c 3828 u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
3832 if (memory_clock < 10000)
3834 else if (memory_clock >= 80000)
3837 mc_para_index = (u8)((memory_clock - 10000) / 5000 + 1);
3841 u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode)
3846 if (memory_clock < 12500)
3848 else if (memory_clock > 47500)
3851 mc_para_index = (u8)((memory_clock - 10000) / 2500);
3853 if (memory_clock < 65000)
3855 else if (memory_clock > 135000
    [all...]
radeon_ni_dpm.c 2166 u32 memory_clock,
2188 memory_clock, strobe_mode, &dividers);
2242 u32 vco_freq = memory_clock * dividers.post_div;
2261 memory_clock);
2285 mclk->mclk_value = cpu_to_be32(memory_clock);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_iceland_smumgr.c 1051 uint32_t memory_clock,
1073 memory_clock, &mpll_param, strobe_mode);
1124 freq_nom = memory_clock * 4 * (1 << mpll_param.mpll_post_divider);
1126 freq_nom = memory_clock * 2 * (1 << mpll_param.mpll_post_divider);
1160 mclk->MclkFrequency = memory_clock;
1174 static uint8_t iceland_get_mclk_frequency_ratio(uint32_t memory_clock,
1180 if (memory_clock < 12500) {
1182 } else if (memory_clock > 47500) {
1185 mc_para_index = (uint8_t)((memory_clock - 10000) / 2500);
1188 if (memory_clock < 65000)
    [all...]
amdgpu_ci_smumgr.c 1028 uint32_t memory_clock,
1049 memory_clock, &mpll_param, strobe_mode);
1081 freq_nom = memory_clock * 4 * (1 << mpll_param.mpll_post_divider);
1083 freq_nom = memory_clock * 2 * (1 << mpll_param.mpll_post_divider);
1108 mclk->MclkFrequency = memory_clock;
1122 static uint8_t ci_get_mclk_frequency_ratio(uint32_t memory_clock,
1128 if (memory_clock < 12500)
1130 else if (memory_clock > 47500)
1133 mc_para_index = (uint8_t)((memory_clock - 10000) / 2500);
1135 if (memory_clock < 65000
    [all...]
amdgpu_tonga_smumgr.c 794 uint32_t memory_clock,
816 memory_clock, &mpll_param, strobe_mode);
876 freq_nom = memory_clock * 4 * (1 << mpll_param.mpll_post_divider);
878 freq_nom = memory_clock * 2 * (1 << mpll_param.mpll_post_divider);
911 mclk->MclkFrequency = memory_clock;
925 static uint8_t tonga_get_mclk_frequency_ratio(uint32_t memory_clock,
931 if (memory_clock < 12500)
933 else if (memory_clock > 47500)
936 mc_para_index = (uint8_t)((memory_clock - 10000) / 2500);
938 if (memory_clock < 65000
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
ppatomctrl.h 296 extern int atomctrl_get_memory_clock_spread_spectrum(struct pp_hwmgr *hwmgr, const uint32_t memory_clock, pp_atomctrl_internal_ss_info *ssInfo);
299 extern int atomctrl_set_engine_dram_timings_rv770(struct pp_hwmgr *hwmgr, uint32_t engine_clock, uint32_t memory_clock);
318 extern int atomctrl_set_ac_timing_ai(struct pp_hwmgr *hwmgr, uint32_t memory_clock,
amdgpu_smu7_hwmgr.c 2924 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk)
2925 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk;
2972 mclk = smu7_ps->performance_levels[0].memory_clock;
2976 [smu7_ps->performance_level_count - 1].memory_clock;
2987 smu7_ps->performance_levels[0].memory_clock = mclk;
2996 if (mclk < smu7_ps->performance_levels[1].memory_clock)
2997 mclk = smu7_ps->performance_levels[1].memory_clock;
2999 smu7_ps->performance_levels[0].memory_clock = mclk;
3000 smu7_ps->performance_levels[1].memory_clock = mclk;
3002 if (smu7_ps->performance_levels[1].memory_clock <
3333 uint32_t engine_clock, memory_clock; local in function:smu7_get_pp_table_entry_callback_func_v0
    [all...]
amdgpu_hardwaremanager.c 399 pclock_info->min_mem_clk = performance_level.memory_clock;
409 pclock_info->max_mem_clk = performance_level.memory_clock;
smu7_hwmgr.h 57 uint32_t memory_clock; member in struct:smu7_performance_level
amdgpu_ppatomctrl.c 180 uint32_t memory_clock)
193 cpu_to_le32(memory_clock & SET_CLOCK_FREQ_MASK);
1284 const uint32_t memory_clock,
1288 ASIC_INTERNAL_MEMORY_SS, memory_clock, ssInfo);
1323 int atomctrl_set_ac_timing_ai(struct pp_hwmgr *hwmgr, uint32_t memory_clock,
1331 memory_clock & SET_CLOCK_FREQ_MASK;
amdgpu_smu10_hwmgr.c 949 level->memory_clock = data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk;
952 level->memory_clock = data->clock_vol_info.vdd_dep_on_fclk->entries[
amdgpu_smu8_hwmgr.c 1586 level->memory_clock = data->sys_info.nbp_memory_clock[SMU8_NUM_NBPMEMORYCLOCK - 1];
1588 level->memory_clock = data->sys_info.nbp_memory_clock[0];
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
hardwaremanager.h 275 uint32_t memory_clock; member in struct:PHM_PerformanceLevel
amdgpu_smu.h 195 uint32_t memory_clock; member in struct:smu_performance_level
320 uint32_t memory_clock; member in struct:smu_clocks
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si_dpm.c 4295 static u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
4299 if (memory_clock < 10000)
4301 else if (memory_clock >= 80000)
4304 mc_para_index = (u8)((memory_clock - 10000) / 5000 + 1);
4308 static u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode)
4313 if (memory_clock < 12500)
4315 else if (memory_clock > 47500)
4318 mc_para_index = (u8)((memory_clock - 10000) / 2500);
4320 if (memory_clock < 65000)
4322 else if (memory_clock > 135000
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
amdgpu_navi10_ppt.c 1466 min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
1489 ret = smu_set_hard_freq_range(smu, SMU_UCLK, min_clocks.memory_clock/100, 0);
amdgpu_smu.c 1596 clk_info->min_mem_clk = level.memory_clock;
1604 clk_info->min_mem_clk = level.memory_clock;
amdgpu_vega20_ppt.c 2248 min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
2269 memtable->dpm_state.hard_min_level = min_clocks.memory_clock/100;

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