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    Searched refs:mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_7_0_offset.h 126 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW 0x0503
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 252 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW 0x0503
vcn_2_0_0_offset.h 248 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW 0x0166
vcn_2_5_offset.h 263 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW 0x0166
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_jpeg_v2_5.c 342 WREG32_SOC15(JPEG, i, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,
amdgpu_jpeg_v1_0.c 527 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, lower_32_bits(ring->gpu_addr));
amdgpu_jpeg_v2_0.c 365 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,
amdgpu_vcn_v1_0.c 1309 WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

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