HomeSort by: relevance | last modified time | path
    Searched refs:mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_d.h 44 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW 0x3c5f
uvd_6_0_d.h 55 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW 0x3c5f
uvd_7_0_offset.h 110 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW 0x045f
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v2_5.c 401 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
408 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
445 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),
454 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect);
463 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),
1167 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),
1179 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),
amdgpu_vcn_v2_0.c 316 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
323 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
362 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),
371 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect);
380 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),
amdgpu_uvd_v7_0.c 667 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
678 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
812 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),
820 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),
amdgpu_vcn_v1_0.c 304 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
311 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
371 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
381 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
amdgpu_uvd_v5_0.c 264 WREG32(mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
amdgpu_uvd_v6_0.c 590 WREG32(mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 236 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW 0x045f
vcn_2_0_0_offset.h 946 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW 0x061f
vcn_2_5_offset.h 867 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW 0x043c

Completed in 50 milliseconds