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    Searched refs:mmVGA_HDP_CONTROL (Results 1 - 15 of 15) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gmc_v6_0.c 262 tmp = RREG32(mmVGA_HDP_CONTROL);
264 WREG32(mmVGA_HDP_CONTROL, tmp);
amdgpu_gmc_v7_0.c 285 tmp = RREG32(mmVGA_HDP_CONTROL);
287 WREG32(mmVGA_HDP_CONTROL, tmp);
amdgpu_gmc_v8_0.c 476 tmp = RREG32(mmVGA_HDP_CONTROL);
478 WREG32(mmVGA_HDP_CONTROL, tmp);
amdgpu_dce_v10_0.c 454 tmp = RREG32(mmVGA_HDP_CONTROL);
459 WREG32(mmVGA_HDP_CONTROL, tmp);
amdgpu_dce_v11_0.c 470 tmp = RREG32(mmVGA_HDP_CONTROL);
475 WREG32(mmVGA_HDP_CONTROL, tmp);
amdgpu_dce_v8_0.c 387 tmp = RREG32(mmVGA_HDP_CONTROL);
392 WREG32(mmVGA_HDP_CONTROL, tmp);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 4385 #define mmVGA_HDP_CONTROL 0x00CA
dce_8_0_d.h 5144 #define mmVGA_HDP_CONTROL 0xca
dce_10_0_d.h 6027 #define mmVGA_HDP_CONTROL 0xca
dce_11_0_d.h 6104 #define mmVGA_HDP_CONTROL 0xca
dce_11_2_d.h 7778 #define mmVGA_HDP_CONTROL 0xca
dce_12_0_offset.h 572 #define mmVGA_HDP_CONTROL 0x000a
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_offset.h 406 #define mmVGA_HDP_CONTROL 0x000a
    [all...]
dcn_2_1_0_offset.h 110 #define mmVGA_HDP_CONTROL 0x000a
    [all...]
dcn_2_0_0_offset.h 50 #define mmVGA_HDP_CONTROL 0x000a
    [all...]

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