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  /src/sys/arch/evbmips/loongson/dev/
glx.c 67 /* MSR access through PCI configuration space */
73 /* access to the MSR through the PCI mailbox needs the same transformation
74 * as done by hardware when a MSR request reaches the CS5536.
82 glx_msra2mbxa(uint msr)
84 uint rf = (msr & GLX_MSR_ADDR_RF);
85 return ((rf << GLX_MSR_ADDR_RF_SHIFT) | (msr & GLX_MSR_ADDR_TARGET));
113 uint64_t msr; local
133 msr = rdmsr(GCSC_DIVIL_BALL_OPTS); /* 0x71 */
134 wrmsr(GCSC_DIVIL_BALL_OPTS, msr | 0x01);
139 msr = 0
312 uint64_t msr; local
360 uint64_t msr; local
424 uint64_t msr; local
487 uint64_t msr; local
555 uint64_t msr; local
612 uint64_t msr; local
667 uint64_t msr; local
714 uint64_t msr; local
775 uint64_t msr; local
834 uint64_t msr; local
900 uint64_t msr; local
    [all...]
gcscpcib_pci.c 99 gcsc_rdmsr(uint msr)
101 return rdmsr(msr);
105 gcsc_wrmsr(uint msr, uint64_t v)
107 wrmsr(msr, v);
  /src/sys/arch/x86/include/
cpu_msr.h 47 uint64_t msr = 0; local
51 /* Read the MSR requested and apply the mask if defined. */
53 msr = rdmsr(msrdat->msr_type);
55 msr &= ~msrdat->msr_mask;
59 msr |= msrdat->msr_value;
60 wrmsr(msrdat->msr_type, msr);
  /src/lib/libc/arch/powerpc/gen/
fpsetmask.c 54 uint32_t msr; local
56 __asm volatile ("mfmsr %0" : "=r"(msr));
57 return msr;
61 mtmsr(uint32_t msr)
64 __asm volatile ("mtmsr %0" : : "r"(msr));
77 uint32_t msr; local
86 msr = mfmsr();
87 msr = (msr & ~(PSL_FE0 | PSL_FE1)) |
89 mtmsr(msr);
    [all...]
  /src/sys/arch/x86/x86/
intel_busclock.c 50 uint64_t msr; local
53 msr = rdmsr(MSR_EBL_CR_POWERON);
54 bus = (msr >> 18) & 0x3;
78 uint64_t msr; local
81 msr = rdmsr(MSR_PERF_STATUS);
82 mult = (msr >> 8) & 0xff;
93 uint64_t msr; local
108 if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
113 bus = (msr >> 0) & 0x7;
125 if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT)
333 uint64_t msr; local
    [all...]
coretemp.c 166 uint64_t msr; local
171 msr = rdmsr(MSR_THERM_STATUS);
172 msr = __SHIFTOUT(msr, MSR_THERM_STATUS_RESOLUTION);
175 aprint_normal(": thermal sensor, %u C resolution", (uint32_t)msr);
226 uint64_t msr; local
232 * Check if the MSR contains thermal
238 msr = rdmsr(MSR_THERM_STATUS);
240 if ((msr & MSR_THERM_STATUS_VALID) == 0)
252 msr = rdmsr(MSR_BIOS_SIGN)
267 uint64_t msr; local
363 uint64_t msr; local
    [all...]
spectre.c 123 uint64_t msr; local
131 msr = rdmsr(MSR_IA32_ARCH_CAPABILITIES);
132 if (msr & IA32_ARCH_IBRS_ALL) {
240 uint64_t msr; local
259 msr = rdmsr(MSR_IA32_SPEC_CTRL);
261 msr |= IA32_SPEC_CTRL_IBRS;
263 msr &= ~IA32_SPEC_CTRL_IBRS;
265 wrmsr(MSR_IA32_SPEC_CTRL, msr);
268 msr = rdmsr(MSR_IC_CFG);
270 msr |= IC_CFG_DIS_IND
409 uint64_t msr; local
460 uint64_t msr, msrval = 0, msrbit = 0; local
671 uint64_t msr; local
794 uint64_t msr; local
826 uint64_t msr; local
    [all...]
  /src/external/gpl3/gdb.old/dist/gdb/nat/
ppc-linux.c 57 ppc64_64bit_inferior_p (long msr)
65 MSR is set. The PowerISA Book III-S MSR is different from the
66 PowerISA Book III-E MSR. The Book III-S MSR is 64 bits wide, and
67 its MSR[SF] is the bit 0 of a 64-bit value. Book III-E MSR is 32
68 bits wide, and its MSR[CM] is the bit 0 of a 32-bit value. */
70 return msr & 0x80000000;
72 return msr < 0
87 long msr; local
    [all...]
  /src/external/gpl3/gdb/dist/gdb/nat/
ppc-linux.c 57 ppc64_64bit_inferior_p (long msr)
65 MSR is set. The PowerISA Book III-S MSR is different from the
66 PowerISA Book III-E MSR. The Book III-S MSR is 64 bits wide, and
67 its MSR[SF] is the bit 0 of a 64-bit value. Book III-E MSR is 32
68 bits wide, and its MSR[CM] is the bit 0 of a 32-bit value. */
70 return msr & 0x80000000;
72 return msr < 0
87 long msr; local
    [all...]
  /src/sys/arch/arm/arm32/
setstack.S 66 msr cpsr_c, r2
70 msr cpsr_c, r3 /* Restore the old mode */
86 msr cpsr_c, r2
90 msr cpsr_c, r3 /* Restore the old mode */
spl.S 66 msr cpsr_c, r2
70 msr cpsr_c, r4 /* Restore interrupts */
86 msr cpsr_c, r2
91 msr cpsr_all, r4
109 msr cpsr_c, r2
114 msr cpsr_c, r4
setcpsr.S 62 msr cpsr_all, r2
  /src/sys/arch/rs6000/stand/boot/
io.c 18 register_t savemsr, msr; local
21 msr = savemsr & ~PSL_DR;
22 __asm volatile ("mtmsr %0" : : "r"(msr));
25 __asm volatile ("mtmsr %0" : : "r"(msr|PSL_DR));
  /src/sys/arch/aarch64/aarch64/
locore_el2.S 73 msr hcr_el2, x2
77 msr vpidr_el2, x2
81 msr vmpidr_el2, x2
88 msr sctlr_el2, x2
95 msr sctlr_el1, x2
101 msr cpacr_el1, x2
106 msr cptr_el2, x2
109 msr hstr_el2, xzr
113 msr cnthctl_el2, x2
116 msr cntvoff_el2, xz
    [all...]
cpuswitch.S 93 msr cpacr_el1, x5 /* restore cpacr_el1 */
102 msr APIAKeyLo_EL1, x5
103 msr APIAKeyHi_EL1, x6
111 msr APIBKeyLo_EL1, x5
112 msr APIBKeyHi_EL1, x6
114 msr APDAKeyLo_EL1, x5
115 msr APDAKeyHi_EL1, x6
117 msr APDBKeyLo_EL1, x5
118 msr APDBKeyHi_EL1, x6
120 msr APGAKeyLo_EL1, x
    [all...]
  /src/sys/arch/powerpc/powerpc/
clock.c 106 uint32_t msr; local
123 : "=r"(msr) : "K"(PSL_EE|PSL_RI));
142 const register_t msr = mfmsr(); local
184 mtmsr(msr | PSL_EE);
192 mtmsr(msr);
195 mtmsr(msr | PSL_EE);
197 mtmsr(msr);
260 int msr, scratch; local
263 : "=r"(msr), "=r"(scratch) : "K"((u_short)~PSL_EE));
266 mtmsr(msr);
276 int msr, scratch; local
    [all...]
pmap_subr.c 275 * MSR fiddling themselves so they can save things on the stack.
285 register_t msr = 0; /* XXX: gcc */ local
321 msr = MFMSR();
322 MTMSR(msr & ~PSL_DR);
353 MTMSR(msr);
364 register_t msr; local
409 msr = MFMSR();
410 MTMSR(msr & ~PSL_DR);
426 MTMSR(msr);
443 register_t msr;
497 register_t msr; local
    [all...]
  /src/sys/arch/powerpc/booke/
copyin.c 54 register_t msr; local
57 "mfmsr %[msr]; " /* Save MSR */
60 "mtmsr %[msr]; sync; isync; " /* DS off */
61 : [msr] "=&r" (msr), [data] "=r" (data)
69 register_t msr; local
72 "mfmsr %[msr]; " /* Save MSR */
75 "mtmsr %[msr]; sync; isync; " /* DS off *
84 register_t msr; local
99 register_t msr; local
114 register_t msr; local
139 register_t msr; local
    [all...]
copyout.c 54 register_t msr; local
56 "mfmsr %[msr]" /* Save MSR */
59 "\n\t" "mtmsr %[msr]; sync; isync" /* DS off */
60 : [msr] "=&r" (msr)
67 register_t msr; local
69 "mfmsr %[msr]" /* Save MSR */
72 "\n\t" "mtmsr %[msr]; sync; isync" /* DS off *
80 register_t msr; local
128 register_t msr; local
165 register_t msr; local
198 register_t msr; local
    [all...]
  /src/sys/arch/powerpc/oea/
altivec.c 87 const register_t msr = mfmsr(); local
88 mtmsr((msr & ~PSL_EE) | PSL_VEC);
98 * Restore MSR (turn off AltiVec)
100 mtmsr(msr);
124 const register_t msr = mfmsr(); local
125 mtmsr((msr & ~PSL_EE) | PSL_VEC);
145 * Restore MSR (turn off AltiVec)
147 mtmsr(msr);
216 register_t omsr, msr; local
223 msr = (omsr & ~PSL_EE) | PSL_VEC
276 register_t omsr, msr; local
    [all...]
  /src/sys/arch/i386/i386/
longrun.c 70 uint64_t msr; member in union:msrinfo
80 /* MSR low, MSR high, flags bit0 */
95 uint64_t msr; local
97 /* PR #32894, make sure the longrun MSR is present */
98 if (rdmsr_safe(MSR_TMx86_LONGRUN, &msr) == EFAULT)
138 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
186 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
191 wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
194 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS)
    [all...]
  /src/share/man/man9/man9.x86/
Makefile 10 MLINKS+=rdmsr.9 msr.9 \
  /src/sys/arch/i386/pci/
gcscpcib_pci.c 99 gcsc_rdmsr(uint msr)
101 return rdmsr(msr);
105 gcsc_wrmsr(uint msr, uint64_t v)
107 wrmsr(msr, v);
  /src/sys/arch/powerpc/ibm4xx/
copyinstr.c 51 int rv, msr, pid, tmp, ctx; local
76 "mfmsr %[msr];" /* Save MSR */
78 "andc %[tmp],%[msr],%[tmp];"
97 "mtmsr %[msr];" /* Restore MSR */
101 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp),
copyoutstr.c 51 int rv, msr, pid, tmp, ctx; local
76 "mfmsr %[msr];" /* Save MSR */
78 "andc %[tmp],%[msr],%[tmp];"
98 "mtmsr %[msr];" /* Restore MSR */
102 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp),

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